{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:01:06Z","timestamp":1759147266790,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,12]]},"DOI":"10.1109\/apccas.2010.5774880","type":"proceedings-article","created":{"date-parts":[[2011,5,27]],"date-time":"2011-05-27T17:30:45Z","timestamp":1306517445000},"page":"300-303","source":"Crossref","is-referenced-by-count":1,"title":["A SystemC content addressable memory power estimation tool for early design verification"],"prefix":"10.1109","author":[{"given":"I-Jui","family":"Tung","sequence":"first","affiliation":[]},{"given":"Kam-Tou","family":"Sio","sequence":"additional","affiliation":[]},{"given":"Chin-Hung","family":"Peng","sequence":"additional","affiliation":[]},{"given":"Feipei","family":"Lai","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.809515"},{"journal-title":"Approved IEEE Draft Standard SystemC Language Reference Manual","year":"2005","key":"ref3"},{"key":"ref10","first-page":"824","article-title":"Architectural power models for SRAM and CAM structures based on hybrid analytical\/empirical techniques","author":"liang","year":"2007","journal-title":"Computer-Aided Design"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1450135.1450166"},{"key":"ref11","first-page":"926","article-title":"Power modeling and low-power design of content addressable memories","volume":"4","author":"hsiao","year":"2001","journal-title":"Proc IEEE Int Symp Circuits and Systems (ISCAS)"},{"journal-title":"NOXIM","year":"0","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.915514"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"},{"journal-title":"ACM\/IEEE\/SCS 23rd Workshop on Principles of Advanced and Distributed Simulation","article-title":"Parallelizing SystemC Kernel for Fast Hardware Simulation on SMP Machines","year":"2009","key":"ref2"},{"key":"ref9","first-page":"316","article-title":"Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block selection algorithm","author":"hsieh","year":"2008","journal-title":"Asia and South Pacific Design Automation Conference"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.864128"}],"event":{"name":"APCCAS 2010-2010 IEEE Asia Pacific Conference on Circuits and Systems","start":{"date-parts":[[2010,12,6]]},"location":"Kuala Lumpur, Malaysia","end":{"date-parts":[[2010,12,9]]}},"container-title":["2010 IEEE Asia Pacific Conference on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5767825\/5774732\/05774880.pdf?arnumber=5774880","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T09:18:07Z","timestamp":1490087887000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5774880\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,12]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/apccas.2010.5774880","relation":{},"subject":[],"published":{"date-parts":[[2010,12]]}}}