{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:18:06Z","timestamp":1730197086349,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,12]]},"DOI":"10.1109\/apccas.2010.5774898","type":"proceedings-article","created":{"date-parts":[[2011,5,27]],"date-time":"2011-05-27T13:30:45Z","timestamp":1306503045000},"page":"204-207","source":"Crossref","is-referenced-by-count":2,"title":["Low power, variable resolution pipelined analog to Digital converter with sub flash architecture"],"prefix":"10.1109","author":[{"given":"Mahesh Kumar","family":"Adimulam","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Krishna Kumar","family":"Movva","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sreehari","family":"Veeramachaneni","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N Moorthy","family":"Muthukrishnan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.B","family":"Srinivas","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"513","article-title":"A 1.8-V 22mW 10- bit 30-MS\/s Subsampling Pipelined CMOS ADC","author":"li","year":"2006","journal-title":"IEEE Custom Integrated Circuits Conference"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856289"},{"journal-title":"Defining and Testing Dynamic Parameters in High-Speed ADCs","year":"2001","key":"ref10"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/4.760378"},{"key":"ref5","article-title":"CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters","volume":"742","author":"van de plassche","year":"2003","journal-title":"The Springer International Series in Engineering and Computer Science"},{"journal-title":"CMOS Circuit Design Layout and Simulation","year":"0","author":"baker","key":"ref8"},{"key":"ref7","first-page":"-385i","article-title":"A low-voltage CMOS low-dropout regulator with enhanced loop response","volume":"1","author":"ka","year":"2004","journal-title":"Circuits and Systems 2004 ISCAS apos 04 Proceedings of the 2004 International Symposium"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.875291"},{"journal-title":"INL\/DNL Measurements for High-Speed Analog To-Digital Converters (ADCs)","year":"0","key":"ref9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.875287"}],"event":{"name":"APCCAS 2010-2010 IEEE Asia Pacific Conference on Circuits and Systems","start":{"date-parts":[[2010,12,6]]},"location":"Kuala Lumpur, Malaysia","end":{"date-parts":[[2010,12,9]]}},"container-title":["2010 IEEE Asia Pacific Conference on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5767825\/5774732\/05774898.pdf?arnumber=5774898","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T05:22:00Z","timestamp":1490073720000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5774898\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,12]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/apccas.2010.5774898","relation":{},"subject":[],"published":{"date-parts":[[2010,12]]}}}