{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:18:26Z","timestamp":1730197106676,"version":"3.28.0"},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,12]]},"DOI":"10.1109\/apccas.2010.5775020","type":"proceedings-article","created":{"date-parts":[[2011,5,27]],"date-time":"2011-05-27T13:30:45Z","timestamp":1306503045000},"page":"1211-1214","source":"Crossref","is-referenced-by-count":5,"title":["An efficient ODT calibration scheme for improved signal integrity in memory interface"],"prefix":"10.1109","author":[{"given":"Gudipati","family":"Kalyan","sequence":"first","affiliation":[]},{"given":"M.B.","family":"Srinivas","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"361","article-title":"On-Die Termination Resistors with Analog Impedance control for Standard CMOS Technology","volume":"38","author":"fan","year":"2003","journal-title":"IEEE JSCC"},{"key":"ref3","first-page":"308","article-title":"A 5.6nS Random Cycle 144Mb DRAM with 1.4Gbps and DDR3-SDRAM interface","volume":"38","author":"pilo","year":"2003","journal-title":"IEEE ISSCC"},{"key":"ref6","article-title":"The design and simulation of a 400\/533 Mbps DDR-II SDRAM memory interconnect bus","author":"sharawi","year":"2008","journal-title":"Proc IEEE Int Multi-Conf Syst Signals Devices"},{"article-title":"High-Speed Digital Design A hand book of Black magic","year":"0","author":"johnson","key":"ref5"},{"key":"ref2","first-page":"300","article-title":"A 1.2V 1.5Gbs 72Mb DDR3 SDRAM","author":"cho","year":"2003","journal-title":"IEEE ISSCC"},{"year":"2008","key":"ref1"}],"event":{"name":"APCCAS 2010-2010 IEEE Asia Pacific Conference on Circuits and Systems","start":{"date-parts":[[2010,12,6]]},"location":"Kuala Lumpur, Malaysia","end":{"date-parts":[[2010,12,9]]}},"container-title":["2010 IEEE Asia Pacific Conference on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5767825\/5774732\/05775020.pdf?arnumber=5775020","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T04:43:47Z","timestamp":1490071427000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5775020\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,12]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/apccas.2010.5775020","relation":{},"subject":[],"published":{"date-parts":[[2010,12]]}}}