{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:19:00Z","timestamp":1730197140362,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,12]]},"DOI":"10.1109\/apccas.2012.6419025","type":"proceedings-article","created":{"date-parts":[[2013,1,30]],"date-time":"2013-01-30T22:53:42Z","timestamp":1359586422000},"page":"276-279","source":"Crossref","is-referenced-by-count":0,"title":["Multiple-output neuron MOS current mirror with bias circuit suitable for Digital-to-Analog converter"],"prefix":"10.1109","author":[{"given":"Satoshi","family":"Matsumoto","sequence":"first","affiliation":[]},{"given":"Sumio","family":"Fukai","sequence":"additional","affiliation":[]},{"given":"Akio","family":"Shimizu","sequence":"additional","affiliation":[]},{"given":"Yohei","family":"Ishikawa","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/4.910469"},{"key":"2","first-page":"353","article-title":"A 14-bit, 200MS\/s digital-toanalog converter without trimming","author":"cheng","year":"2004","journal-title":"IEEE ISCAS"},{"key":"10","article-title":"Study on multiple-output neuron mos current mirror for current-steering digital-to-analog converter","author":"yasumoto","year":"2010","journal-title":"SASIMI"},{"key":"1","article-title":"A fully integrated current-steering 10-b cmos d\/a converter with on-chip terminated resistors","volume":"e87 c","author":"hwang","year":"2004","journal-title":"IEICE Tran Electron"},{"key":"7","article-title":"Neuron MOS binarylogic integrated circuits Part I: Design fundamentals and soft-hardware-logic circuit implementation","volume":"40","author":"ohmi","year":"1993","journal-title":"IEEE Transactions on Electron Devices"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/16.137325"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2008.4746237"},{"journal-title":"Design of 12-Bit 500MHz CMOS Current-Mode DAC with Deglitch Circuit-Design of Wide Bandwidth Digital to Analog Converter","year":"0","author":"cho","key":"4"},{"key":"9","first-page":"322","article-title":"A multiple-output current mirror with neuron mosfets","author":"shimizu","year":"2009","journal-title":"ITCCSCC2009 A-02-0315"},{"key":"8","article-title":"Neuron MOS binary-logic integrated circuits Part II: Simplifying techniques of circuit configuration and their practical applications","volume":"40","author":"ohmi","year":"1993","journal-title":"IEEE Transactions on Electron Devices"}],"event":{"name":"APCCAS 2012-2012 IEEE Asia Pacific Conference on Circuits and Systems","start":{"date-parts":[[2012,12,2]]},"location":"Kaohsiung, Taiwan","end":{"date-parts":[[2012,12,5]]}},"container-title":["2012 IEEE Asia Pacific Conference on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6412846\/6418954\/06419025.pdf?arnumber=6419025","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T20:45:57Z","timestamp":1490129157000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6419025\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,12]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/apccas.2012.6419025","relation":{},"subject":[],"published":{"date-parts":[[2012,12]]}}}