{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T22:54:20Z","timestamp":1725663260072},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,11]]},"DOI":"10.1109\/apccas.2014.7032877","type":"proceedings-article","created":{"date-parts":[[2015,2,11]],"date-time":"2015-02-11T22:20:39Z","timestamp":1423693239000},"page":"699-702","source":"Crossref","is-referenced-by-count":6,"title":["Comparative study of power-gating architectures for nonvolatile SRAM cells based on spintronics technology"],"prefix":"10.1109","author":[{"given":"Yusuke","family":"Shuto","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shuu'ichirou","family":"Yamamoto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Satoshi","family":"Sugahara","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","DOI":"10.7567\/SSDM.2010.F-9-3","article-title":"Hierarchical Nonvolatile Memory with Perpendicular Magnetic Tunnel Junctions for Normally-Off Computing","author":"abe","year":"2010","journal-title":"International Conference on Solid State Devices and Materials 2010"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2295026"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1063\/1.4870599"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2627369.2631641"},{"journal-title":"Predictive Technology Model (PTM)","year":"0","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.891648"},{"journal-title":"2012 Symposium on VLSI Technology","year":"2012","author":"park","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1063\/1.3694270"},{"key":"ref18","article-title":"A CMOS Scheme for 0.5V Supply Voltage with Pico-Ampere Standby Current","author":"kawaguchi","year":"1998","journal-title":"IEEE International Solid-State Circuits Conference"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1049\/el.2011.1807"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2064272"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.7567\/JJAP.51.040212"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1143\/JJAP.48.043001"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2253412"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1063\/1.3076895"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6479131"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.400426"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6479023"}],"event":{"name":"2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","start":{"date-parts":[[2014,11,17]]},"location":"Ishigaki, Japan","end":{"date-parts":[[2014,11,20]]}},"container-title":["2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7021138\/7032694\/07032877.pdf?arnumber=7032877","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T05:21:56Z","timestamp":1498195316000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7032877\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,11]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/apccas.2014.7032877","relation":{},"subject":[],"published":{"date-parts":[[2014,11]]}}}