{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,4]],"date-time":"2026-03-04T17:23:31Z","timestamp":1772645011952,"version":"3.50.1"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,11]]},"DOI":"10.1109\/apccas.2014.7032878","type":"proceedings-article","created":{"date-parts":[[2015,2,11]],"date-time":"2015-02-11T22:20:39Z","timestamp":1423693239000},"page":"703-706","source":"Crossref","is-referenced-by-count":23,"title":["A novel design of a memristor-based look-up table (LUT) for FPGA"],"prefix":"10.1109","author":[{"given":"T. Nandha","family":"Kumar","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Haider A. F.","family":"Almurib","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fabrizio","family":"Lombardi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2008.160"},{"key":"ref3","first-page":"210","article-title":"SPICE Model of Memristor with Nonlinear Dopant Drift","volume":"18","author":"biolek","year":"2009","journal-title":"Radioengineering"},{"key":"ref10","first-page":"71","article-title":"On the Operational Features and Performance of a Memristor-Based Cell for a LUT of an FPGA","author":"kumar","year":"2013","journal-title":"Proc of 13th IEEE International Conference on Nanotechnology"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2063444"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2078710"},{"key":"ref5","first-page":"1","article-title":"mrFPGA: A Novel FPGA Scheme with Memristor-Based Reconfiguration","author":"cong","year":"2011","journal-title":"Proc IEEE\/ACM International Symposium on Nanoscale Architectures"},{"key":"ref12","first-page":"1","article-title":"Design Implications of Memristor-Based RRAM Cross-Point Structures","author":"xu","year":"2011","journal-title":"Proc of Design Automation and Test in Europe"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2011.2166805"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2765491.2765510"},{"key":"ref2","article-title":"Xilinx SpartanTM-3AN FPGAs","year":"0"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/NANO.2011.6144367"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2012.0117"}],"event":{"name":"2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","location":"Ishigaki, Japan","start":{"date-parts":[[2014,11,17]]},"end":{"date-parts":[[2014,11,20]]}},"container-title":["2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7021138\/7032694\/07032878.pdf?arnumber=7032878","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T00:21:23Z","timestamp":1490314883000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7032878\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,11]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/apccas.2014.7032878","relation":{},"subject":[],"published":{"date-parts":[[2014,11]]}}}