{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T20:23:51Z","timestamp":1725395031840},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,10]]},"DOI":"10.1109\/apccas.2016.7803936","type":"proceedings-article","created":{"date-parts":[[2017,1,11]],"date-time":"2017-01-11T16:22:50Z","timestamp":1484151770000},"page":"214-217","source":"Crossref","is-referenced-by-count":0,"title":["Optimization of area and power in multi-mode power gating scheme for static memory elements"],"prefix":"10.1109","author":[{"given":"Xing","family":"Su","sequence":"first","affiliation":[]},{"given":"Shinji","family":"Kimura","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090750"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cds.2013.0205"},{"key":"ref6","article-title":"New Power Gated SRAM Cell in 90nm CMOS Technology with Low Leakage Current and High Data Stability for Sleep Mode","author":"naresh","year":"2014","journal-title":"IEEE Int Conf on Computational Intelligence and Computing Research (ICCIC)"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937453"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/UKSIM.2011.108"},{"key":"ref7","article-title":"Synchronous 16×8 SRAM Design","author":"daya","year":"2011","journal-title":"University of Florida"},{"key":"ref2","first-page":"129","article-title":"Distributed data-retention power gating techniques for column and row co-controlled embedded SRAM","author":"hua","year":"2005","journal-title":"Proc IEEE Int Workshop Memory Technol Design Test"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2014.6908564"},{"key":"ref1","first-page":"55","article-title":"SRAM leakage suppression by minimizing standby supply voltage","author":"qin","year":"2004","journal-title":"Int Symp Quality Electronic Design"}],"event":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","start":{"date-parts":[[2016,10,25]]},"location":"Jeju, South Korea","end":{"date-parts":[[2016,10,28]]}},"container-title":["2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7786273\/7803879\/07803936.pdf?arnumber=7803936","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,1,21]],"date-time":"2017-01-21T00:13:13Z","timestamp":1484957593000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7803936\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,10]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/apccas.2016.7803936","relation":{},"subject":[],"published":{"date-parts":[[2016,10]]}}}