{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T17:49:27Z","timestamp":1729619367128,"version":"3.28.0"},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,10]]},"DOI":"10.1109\/apccas.2016.7803966","type":"proceedings-article","created":{"date-parts":[[2017,1,11]],"date-time":"2017-01-11T21:22:50Z","timestamp":1484169770000},"page":"327-329","source":"Crossref","is-referenced-by-count":3,"title":["A 3.5\/7.0\/14-Gb\/s multi-rate clock and data recovery circuit with a multi-mode rotational binary phase detector"],"prefix":"10.1109","author":[{"given":"Ki-Hyun","family":"Pyun","sequence":"first","affiliation":[]},{"given":"Dae-Hyun","family":"Kwon","sequence":"additional","affiliation":[]},{"given":"Woo-Young","family":"Choi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"1400","article-title":"A self-calibrating multi-VCO PLL scheme with leakage and capacitive modulation mitigations","author":"dong","year":"2013","journal-title":"IEEE ISCAS Papers"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/ISCAS.2011.5937773"},{"key":"ref6","first-page":"184","article-title":"A 650Mb\/s-to-8Gb\/s referenceless CDR circuit with automatic acquisition of data rate","author":"lee","year":"2009","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"2858","DOI":"10.1109\/TCSI.2012.2206456","article-title":"A 5.4\/2.7\/1.62-Gb\/s Receiver for DisplayPort Version 1.2 With Multi-Rate Operation Scheme","volume":"59","author":"lee","year":"2012","journal-title":"IEEE Trans Circuits and Systems-I Regular Papers"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/JSSC.2009.2021913"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/JSSC.2011.2168872"},{"key":"ref2","first-page":"414","article-title":"A 24-to-35Gb\/s x4 VCSEL Driver IC with Multi-Rate Referenceless CDR in 0.13µm SiGe BiCMOS","author":"tsunoda","year":"2015","journal-title":"IEEE ISSCC Dig Tech Papers"},{"year":"2007","journal-title":"Video Electronics Standards Association","key":"ref1"}],"event":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","start":{"date-parts":[[2016,10,25]]},"location":"Jeju, South Korea","end":{"date-parts":[[2016,10,28]]}},"container-title":["2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7786273\/7803879\/07803966.pdf?arnumber=7803966","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,25]],"date-time":"2017-06-25T08:00:15Z","timestamp":1498377615000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7803966\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,10]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/apccas.2016.7803966","relation":{},"subject":[],"published":{"date-parts":[[2016,10]]}}}