{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T20:37:36Z","timestamp":1725655056125},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,12,8]],"date-time":"2020-12-08T00:00:00Z","timestamp":1607385600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,12,8]],"date-time":"2020-12-08T00:00:00Z","timestamp":1607385600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,12,8]],"date-time":"2020-12-08T00:00:00Z","timestamp":1607385600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,12,8]]},"DOI":"10.1109\/apccas50809.2020.9301716","type":"proceedings-article","created":{"date-parts":[[2020,12,29]],"date-time":"2020-12-29T20:59:56Z","timestamp":1609275596000},"page":"220-223","source":"Crossref","is-referenced-by-count":1,"title":["A 72-nW 440-mV Time Register Using Stacked-NMOS-Switched Gated Delay Cell in Biomedical Applications"],"prefix":"10.1109","author":[{"given":"Guowei","family":"Chen","sequence":"first","affiliation":[]},{"given":"Dang","family":"Cong Bui","sequence":"additional","affiliation":[]},{"given":"Xinyang","family":"Yu","sequence":"additional","affiliation":[]},{"given":"Md.","family":"Zahidul Islam","sequence":"additional","affiliation":[]},{"given":"Atsuki","family":"Kobayashi","sequence":"additional","affiliation":[]},{"given":"Kiichi","family":"Niitsu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1038\/s41551-017-0049"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JERM.2020.2998325"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2415631"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2198977"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7169012"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2869569"},{"key":"ref8","first-page":"240","article-title":"A 0.004mm2 250?W ?? TDC with the time-difference accumulator and a 0.012mm2 2.5mW bangbang digital PLL using PRNG for low-power SoC applications","author":"hong","year":"2012","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1039\/C6TA08358G"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2791516"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2297412"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2017.2735447"}],"event":{"name":"2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","start":{"date-parts":[[2020,12,8]]},"location":"Ha Long, Vietnam","end":{"date-parts":[[2020,12,10]]}},"container-title":["2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9298528\/9301643\/09301716.pdf?arnumber=9301716","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T15:44:49Z","timestamp":1656344689000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9301716\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,12,8]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/apccas50809.2020.9301716","relation":{},"subject":[],"published":{"date-parts":[[2020,12,8]]}}}