{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,12,29]],"date-time":"2024-12-29T05:05:16Z","timestamp":1735448716866,"version":"3.32.0"},"reference-count":30,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T00:00:00Z","timestamp":1730937600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T00:00:00Z","timestamp":1730937600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,11,7]]},"DOI":"10.1109\/apccas62602.2024.10808244","type":"proceedings-article","created":{"date-parts":[[2024,12,27]],"date-time":"2024-12-27T19:09:25Z","timestamp":1735326565000},"page":"144-148","source":"Crossref","is-referenced-by-count":0,"title":["An Automated Design Platform for ReRAM-based DNN Accelerators with Hardware-Software Co-exploration"],"prefix":"10.1109","author":[{"given":"Yung-Cheng","family":"Lai","sequence":"first","affiliation":[{"name":"Chang Gung University,Dept. of Computer Science &#x0026; Information Engineering,Taoyuan,R.O.C"}]},{"given":"Chin-Fu","family":"Nien","sequence":"additional","affiliation":[{"name":"National Yang Ming Chiao Tung University,Dept. of Electronics and Electrical Engineering,Hsinchu,R.O.C"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/ACCESS.2023.3326990"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/MSP.2012.2205597"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.23919\/DATE.2018.8342277"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/IEDM45625.2022.10019367"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.23919\/DATE.2018.8342277"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/ISCA.2016.12"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1145\/3061639.3062191"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/TC.2020.2964671"},{"key":"ref9","first-page":"469","article-title":"MNSIM: Simulation platform for memristor-based neuromorphic computing system","volume-title":"2016 Design, Automation& Test in Europe Conference& Exhibition (DATE)","author":"Xia"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/TCAD.2018.2789723"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/TCAD.2012.2185930"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/EMC2-NIPS53020.2019.00008"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/TCSII.2022.3163177"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/JETCAS.2017.2776980"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1109\/ICCD46524.2019.00020"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/TC.2022.3160345"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/TCAD.2020.3012250"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1109\/AIKE.2019.00060"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1109\/ACCESS.2020.2981072"},{"key":"ref20","first-page":"236","article-title":"Sparse ReRAM engine: Joint exploration of activation and weight sparsity in compressed neural networks","volume-title":"2019 ACM\/IEEE 46th Annual International Symposium on Computer Architecture (ISCA)","author":"Yang"},{"year":"2006","author":"Wang","journal-title":"VLSI Test Principles and Architectures: Design for Testability, ser. Systems on Silicon.","key":"ref21"},{"doi-asserted-by":"publisher","key":"ref22","DOI":"10.1109\/TC.2014.12"},{"key":"ref23","article-title":"Zero-space cost fault tolerance for transformerbased language models on ReRAM","volume":"abs\/2401.11664","author":"Li","year":"2024","journal-title":"ArXiv"},{"doi-asserted-by":"publisher","key":"ref24","DOI":"10.1109\/ASP-DAC52403.2022.9712542"},{"key":"ref25","first-page":"1","article-title":"Noise injection adaption: End-to-end reram crossbar non-ideal effect adaption for neural network mapping","volume-title":"2019 56th ACM\/IEEE Design Automation Conference (DAC)","author":"He"},{"doi-asserted-by":"publisher","key":"ref26","DOI":"10.1109\/ICCAD51958.2021.9643444"},{"key":"ref27","first-page":"859","article-title":"Uncertainty modeling of emerging device based computing-in-memory neural accelerators with application to neural architecture search","volume-title":"2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)","author":"Yan"},{"doi-asserted-by":"publisher","key":"ref28","DOI":"10.1109\/DAC18072.2020.9218676"},{"doi-asserted-by":"publisher","key":"ref29","DOI":"10.1109\/TC.2020.2991575"},{"doi-asserted-by":"publisher","key":"ref30","DOI":"10.23919\/DATE54114.2022.9774605"}],"event":{"name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","start":{"date-parts":[[2024,11,7]]},"location":"Taipei, Taiwan","end":{"date-parts":[[2024,11,9]]}},"container-title":["2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10808178\/10808208\/10808244.pdf?arnumber=10808244","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,28]],"date-time":"2024-12-28T06:25:55Z","timestamp":1735367155000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10808244\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,11,7]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/apccas62602.2024.10808244","relation":{},"subject":[],"published":{"date-parts":[[2024,11,7]]}}}