{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T18:40:08Z","timestamp":1771612808997,"version":"3.50.1"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T00:00:00Z","timestamp":1730937600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T00:00:00Z","timestamp":1730937600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,11,7]]},"DOI":"10.1109\/apccas62602.2024.10808367","type":"proceedings-article","created":{"date-parts":[[2024,12,27]],"date-time":"2024-12-27T19:09:25Z","timestamp":1735326565000},"page":"781-784","source":"Crossref","is-referenced-by-count":1,"title":["Lightweight Binary Neural Networks for Edge Devices"],"prefix":"10.1109","author":[{"given":"Hyunkyu","family":"Kang","sequence":"first","affiliation":[{"name":"Hongik University,School of Elecronic and Electrical Engineering,Seoul,South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Seokhoon","family":"Kim","sequence":"additional","affiliation":[{"name":"Hongik University,School of Elecronic and Electrical Engineering,Seoul,South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sanghyeok","family":"Moon","sequence":"additional","affiliation":[{"name":"Hongik University,School of Elecronic and Electrical Engineering,Seoul,South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Youngmin","family":"Kim","sequence":"additional","affiliation":[{"name":"Hongik University,School of Elecronic and Electrical Engineering,Seoul,South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.patcog.2020.107281"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.5555\/3045118.3045167"},{"key":"ref3","article-title":"MNIST tutorial","year":"2024"},{"key":"ref4","volume-title":"Vitis high-level synthesis user guide","year":"2024"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021744"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3242897"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.neucom.2017.09.046"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SIES.2018.8442108"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1587\/transinf.2021EDP7054"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP54787.2022.00025"}],"event":{"name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","location":"Taipei, Taiwan","start":{"date-parts":[[2024,11,7]]},"end":{"date-parts":[[2024,11,9]]}},"container-title":["2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10808178\/10808208\/10808367.pdf?arnumber=10808367","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,28]],"date-time":"2024-12-28T06:06:15Z","timestamp":1735365975000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10808367\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,11,7]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/apccas62602.2024.10808367","relation":{},"subject":[],"published":{"date-parts":[[2024,11,7]]}}}