{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,14]],"date-time":"2026-04-14T16:01:02Z","timestamp":1776182462076,"version":"3.50.1"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T00:00:00Z","timestamp":1730937600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T00:00:00Z","timestamp":1730937600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100005049","name":"Science and Engineering Research Council","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100005049","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,11,7]]},"DOI":"10.1109\/apccas62602.2024.10808419","type":"proceedings-article","created":{"date-parts":[[2024,12,27]],"date-time":"2024-12-27T19:09:25Z","timestamp":1735326565000},"page":"241-245","source":"Crossref","is-referenced-by-count":4,"title":["Sub-Threshold Delay-Locked Loop with Piecewise Linearization and Time-Mode Proportional-Integral Locking"],"prefix":"10.1109","author":[{"given":"Wenhao","family":"Wu","sequence":"first","affiliation":[{"name":"Toronto Metropolitan University,Dept. of Electrical, Computer, and Biomedical Eng.,Toronto,ON,Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fei","family":"Yuan","sequence":"additional","affiliation":[{"name":"Toronto Metropolitan University,Dept. of Electrical, Computer, and Biomedical Eng.,Toronto,ON,Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yushi","family":"Zhou","sequence":"additional","affiliation":[{"name":"Lakehead University,Dept. of Electrical and Computer Eng.,Thunder Bay,ON,Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2016.2573978"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2043893"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2922726"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2022.3195632"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS60917.2024.10658857"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS58744.2024.10557916"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS60917.2024.10658793"},{"key":"ref8","article-title":"Analysis and design of analog integrated circuits","author":"Gray","year":"2001"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2002.808156"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2928789"}],"event":{"name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","location":"Taipei, Taiwan","start":{"date-parts":[[2024,11,7]]},"end":{"date-parts":[[2024,11,9]]}},"container-title":["2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10808178\/10808208\/10808419.pdf?arnumber=10808419","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,28]],"date-time":"2024-12-28T06:26:30Z","timestamp":1735367190000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10808419\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,11,7]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/apccas62602.2024.10808419","relation":{},"subject":[],"published":{"date-parts":[[2024,11,7]]}}}