{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T08:08:17Z","timestamp":1771574897438,"version":"3.50.1"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,10,12]],"date-time":"2025-10-12T00:00:00Z","timestamp":1760227200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,10,12]],"date-time":"2025-10-12T00:00:00Z","timestamp":1760227200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,10,12]]},"DOI":"10.1109\/apccas67402.2025.11377664","type":"proceedings-article","created":{"date-parts":[[2026,2,19]],"date-time":"2026-02-19T20:54:40Z","timestamp":1771534480000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["Design Automation and Optimization of Frequency Dividers"],"prefix":"10.1109","author":[{"given":"Poornishwar","family":"M","sequence":"first","affiliation":[{"name":"Indian Institute of Technology Madras,Chennai,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Inban","family":"S","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Madras,Chennai,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Ramprasath","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Madras,Chennai,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sankaran","family":"Aniruddhan","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Madras,Chennai,India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/FTFC.2013.6577763"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/S3S.2017.8308751"},{"key":"ref3","article-title":"Logical effort: Designing fast CMOS circuits. Morgan Kaufmann","author":"Sutherland","year":"1999","journal-title":"IEEE Solid-State Circuits Letters"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050997"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.Design.2009.14"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICDV61346.2024.10616695"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2018.2876826"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT55466.2022.9963357"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2020.3001651"},{"key":"ref10","article-title":"A $6.5 \\times 7 \\mu m^{2} 0.98$-to- 1.5 mW","author":"Chen","journal-title":"Nonself-Oscillation-Mode Frequency Divider-by-2 Achieving a Single-Band Untuned Locking Range of 166.6"}],"event":{"name":"2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","location":"Busan, Korea, Republic of","start":{"date-parts":[[2025,10,12]]},"end":{"date-parts":[[2025,10,15]]}},"container-title":["2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11373921\/11376610\/11377664.pdf?arnumber=11377664","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T07:19:57Z","timestamp":1771571997000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11377664\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10,12]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/apccas67402.2025.11377664","relation":{},"subject":[],"published":{"date-parts":[[2025,10,12]]}}}