{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T08:04:48Z","timestamp":1771574688740,"version":"3.50.1"},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,10,12]],"date-time":"2025-10-12T00:00:00Z","timestamp":1760227200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,10,12]],"date-time":"2025-10-12T00:00:00Z","timestamp":1760227200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,10,12]]},"DOI":"10.1109\/apccas67402.2025.11377768","type":"proceedings-article","created":{"date-parts":[[2026,2,19]],"date-time":"2026-02-19T20:54:40Z","timestamp":1771534480000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["High-Speed Matrix-Thread Co-Optimized NTT Design for ML-KEM"],"prefix":"10.1109","author":[{"given":"Gong","family":"Chen","sequence":"first","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jiansheng","family":"Chen","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tianyang","family":"Yu","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhirui","family":"Zhang","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bei","family":"Wang","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fangyu","family":"Zheng","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, University of Chinese Acadamy of Sciences,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yijun","family":"Cui","sequence":"additional","affiliation":[{"name":"College of Integrated Circuits, Nanjing University of Aeronautics and Astronautics,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1201\/9780203888933.ch14"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.6028\/nist.fips.203.ipd"},{"key":"ref3","article-title":"Module-lattice-based digital signature standard","volume-title":"FIPS 204 Standard","author":"Raimondo","year":"2023"},{"key":"ref4","first-page":"1","article-title":"Sphincs+-submission to the 3rd round of the nist post-quantum project v3. 1","author":"Aumasson","year":"2022","journal-title":"NIST PQC Round"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2021.i2.159-188"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2020.3025691"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-17143-7_25"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-021-03980-5"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD58817.2023.00061"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JXCDC.2022.3202517"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.2307\/2007970"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-47721-7_24"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH51176.2021.00028"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2021.3073475"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS56072.2025.11043587"}],"event":{"name":"2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","location":"Busan, Korea, Republic of","start":{"date-parts":[[2025,10,12]]},"end":{"date-parts":[[2025,10,15]]}},"container-title":["2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11373921\/11376610\/11377768.pdf?arnumber=11377768","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T07:08:29Z","timestamp":1771571309000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11377768\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10,12]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/apccas67402.2025.11377768","relation":{},"subject":[],"published":{"date-parts":[[2025,10,12]]}}}