{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,21]],"date-time":"2025-12-21T06:25:38Z","timestamp":1766298338944},"reference-count":24,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/arith.2003.1207662","type":"proceedings-article","created":{"date-parts":[[2004,3,22]],"date-time":"2004-03-22T14:34:28Z","timestamp":1079966068000},"page":"70-78","source":"Crossref","is-referenced-by-count":14,"title":["Hardware implementations of denormalized numbers"],"prefix":"10.1109","author":[{"given":"E.M.","family":"Schwarz","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Schmookler","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.D.","family":"Trong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/12.16494"},{"key":"ref11","first-page":"16","article-title":"Method and apparatus for multiplying denomalised binary floating point numbers without additional delay","author":"williams","year":"1994"},{"key":"ref12","first-page":"8","article-title":"Floating-point multiplier for de-normalized inputs","author":"krygowski","year":"2002"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2003.1207664"},{"key":"ref14","first-page":"10","article-title":"Normalizing pipelined floating point processing unit","author":"gupta","year":"1993"},{"key":"ref15","first-page":"11","article-title":"Normalizing pipelined floating point processing unit","author":"gupta","year":"1991"},{"key":"ref16","first-page":"8","article-title":"Denormalization system and method of operation","author":"taborn","year":"1997"},{"key":"ref17","first-page":"6","article-title":"Method and system for executing denor-malized numbers","author":"schwarz","year":"1999"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1147\/rd.435.0707"},{"key":"ref19","first-page":"15","article-title":"Method and apparatus for normalization of a floating point binary number","author":"urano","year":"1996"},{"year":"1997","key":"ref4","article-title":"IA-32 Intel Architecture Sotware Developer's Manual Volume 1 Basic Architecture"},{"key":"ref3","first-page":"173","article-title":"l-GHz HAL SPARC65 dual floating point unit with RAS features","author":"naini","year":"2001","journal-title":"Proc of Fifteenth Symp on Com-put Arith"},{"article-title":"The PowerPC Architecture: a specification for a new family of RISC processors","year":"2002","author":"may","key":"ref6"},{"key":"ref5","first-page":"7","article-title":"Method and apparatus for performing fast floating point operantkbttions","author":"dyke-lewis","year":"1999"},{"journal-title":"Order No SA 22-7832-1 available through IBM branch offices","article-title":"z\/Architecture Principles of Operation","year":"2001","key":"ref8"},{"year":"2001","key":"ref7","article-title":"Intel Itanium Architecture Sofware Developer's Manual Volume 1 Application Ar-chitecture"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.1995.465364"},{"year":"1985","key":"ref1"},{"journal-title":"Order No SA 22&#x2013;7201-5 available through IBM branch offices","article-title":"Enterprise Systems Architecture\/390 Principles of Operation","year":"1998","key":"ref9"},{"key":"ref20","first-page":"22","article-title":"Multiplication apparatus and methods which generate a shift amount by which the product of the significands is shifted for normalization or denorrnalization","author":"gorshtein","year":"1999"},{"key":"ref22","first-page":"13","article-title":"Method and apparatus for bounding alignment shifts to enable at speed denormalized result generation in an FMAC","author":"naffziger","year":"1998"},{"key":"ref21","first-page":"34","article-title":"Computer methods and apparatus for eliminating leading non-significant digits in floating point computations","author":"grushin","year":"1998"},{"key":"ref24","first-page":"10","article-title":"Method and apparatus to perform pipelined denormalization of floating-point re-sults","author":"handlogten","year":"1999"},{"key":"ref23","first-page":"9","article-title":"Fast floating point results alignment apparatus","author":"bjorksten","year":"1998"}],"event":{"name":"16th IEEE Symposium on Computer Arithmetic","acronym":"ARITH-03","location":"Santiago de Compostela, Spain"},"container-title":["16th IEEE Symposium on Computer Arithmetic, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8582\/27181\/01207662.pdf?arnumber=1207662","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T19:21:46Z","timestamp":1489432906000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1207662\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/arith.2003.1207662","relation":{},"subject":[]}}