{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,4]],"date-time":"2025-10-04T07:53:24Z","timestamp":1759564404616},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007,7]]},"DOI":"10.1109\/asap.2007.4429967","type":"proceedings-article","created":{"date-parts":[[2008,1,14]],"date-time":"2008-01-14T20:09:20Z","timestamp":1200341360000},"page":"115-121","source":"Crossref","is-referenced-by-count":13,"title":["Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit"],"prefix":"10.1109","author":[{"given":"Charles","family":"Tsen","sequence":"first","affiliation":[]},{"given":"Michael","family":"Schulte","sequence":"additional","affiliation":[]},{"given":"Sonia","family":"Gonzalez-Navarro","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"2002","key":"ref10","article-title":"The ‘telco’ benchmark"},{"year":"2006","key":"ref11","article-title":"Draft Standard for Floating-Point Arithmetic"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.884047"},{"article-title":"IBM's Power6 Gets Help with Math Multimedia","year":"2006","author":"shankland","key":"ref13"},{"journal-title":"Sun Microsystems Inc","article-title":"BigDecimal (Java 2 Platforms SE v1.4.0)","year":"2002","key":"ref14"},{"key":"ref15","article-title":"Binary-Integer Decimal Encoding for Decimal Floating-Point","author":"tang","year":"0","journal-title":"Intel Corporation"},{"key":"ref16","article-title":"BID Building Blocks","author":"tang","year":"0","journal-title":"Intermap Techn Internal Report"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2004.1339563"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"84","DOI":"10.1109\/ASAP.2004.1342461","article-title":"Decimal Floating-Point Division Using Newton-Raphson Iteration","author":"wang","year":"2004","journal-title":"Proceedings of the IEEE International Conference on Application-Specific Systems Architectures and Processors"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"309","DOI":"10.1109\/ASAP.2005.29","article-title":"Decimal Floating-Point Square Root Using Newton-Raphson Iteration","author":"wang","year":"2005","journal-title":"Proceedings of the IEEE International Conference on Application-Specific Systems Architectures and Processors"},{"key":"ref4","article-title":"Software Implementation of the IEEE 754R Decimal Floating-Point Arithmetic","author":"cornea","year":"2006","journal-title":"Proceedings of the Third International Conference on Software and Data Technologies"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2007.7"},{"article-title":"The decNumber Library","year":"0","author":"cowlishaw","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2003.1207666"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1147\/rd.511.0217"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20020407"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1983.1676238"},{"key":"ref1","first-page":"31","article-title":"A Decimal Floating-Point Processor for Optimal Arithmetic","author":"bohlender","year":"1987","journal-title":"Computer Arithmetic Scientific Computation and Programming Languages"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/178243.178249"},{"key":"ref20","article-title":"Performance Analysis and Benchmarking for Decimal Floating-Point Applications","author":"wang","year":"2007","journal-title":"submitted to the International Conference on Computer Design"},{"article-title":"Hacker's Delight","year":"2003","author":"warren","key":"ref21"}],"event":{"name":"IEEE 18th International Conference Application-specific Systems, Architectures and Processors","start":{"date-parts":[[2007,7,9]]},"location":"Montreal, Que.","end":{"date-parts":[[2007,7,11]]}},"container-title":["2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4429947\/4429948\/04429967.pdf?arnumber=4429967","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,4,30]],"date-time":"2020-04-30T19:14:03Z","timestamp":1588274043000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/4429967\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,7]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/asap.2007.4429967","relation":{},"subject":[],"published":{"date-parts":[[2007,7]]}}}