{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:18:48Z","timestamp":1729660728840,"version":"3.28.0"},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,7]]},"DOI":"10.1109\/asap.2008.4580174","type":"proceedings-article","created":{"date-parts":[[2008,8,4]],"date-time":"2008-08-04T15:35:12Z","timestamp":1217864112000},"page":"173-178","source":"Crossref","is-referenced-by-count":0,"title":["Dynamic holographic reconfiguration on a four-context ODRGA"],"prefix":"10.1109","author":[{"family":"Mao Nakajima","sequence":"first","affiliation":[]},{"family":"Minoru Watanabe","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2005.1568564"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2005.54"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2004.1362436"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2004.1261015"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2002.1188682"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2006.382216"},{"key":"11","doi-asserted-by":"crossref","first-page":"14","DOI":"10.1117\/12.363963","article-title":"optical memory for computing and information processing","volume":"3804","author":"mumbru","year":"1999","journal-title":"SPIE on Algorithms Devices and Systems for Optical Information Processing III"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/SSMSD.2000.836438"},{"journal-title":"LatticeECP and EC Family Data Sheet","year":"2005","key":"3"},{"journal-title":"Xilinx Product Data Sheets","year":"0","key":"2"},{"journal-title":"Altera Devices","year":"0","key":"1"},{"key":"10","first-page":"763","article-title":"optically programmable gate array","volume":"4089","author":"mumbru","year":"2000","journal-title":"SPIE of Optics in Computing"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1998.707884"},{"key":"6","first-page":"47","article-title":"dynamically programmable gate arrays: a step toward increased computational density","author":"dehon","year":"1996","journal-title":"Fourth Canadian Workshop on Field Programmable Devices"},{"key":"5","first-page":"99","article-title":"development of dynamically reconfigurable processor lsi","volume":"56","author":"nakano","year":"2003","journal-title":"NEC Tech J (Japan)"},{"year":"0","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1995.518231"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1997.624601"}],"event":{"name":"2008 International Conference on Application-Specific Systems, Architectures and Processors (ASAP)","start":{"date-parts":[[2008,7,2]]},"location":"Leuven, Belgium","end":{"date-parts":[[2008,7,4]]}},"container-title":["2008 International Conference on Application-Specific Systems, Architectures and Processors"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4569858\/4580144\/04580174.pdf?arnumber=4580174","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T10:37:27Z","timestamp":1497782247000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4580174\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,7]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/asap.2008.4580174","relation":{},"subject":[],"published":{"date-parts":[[2008,7]]}}}