{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T14:51:05Z","timestamp":1761663065845,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,10]]},"DOI":"10.1109\/asicon.2011.6157226","type":"proceedings-article","created":{"date-parts":[[2012,2,28]],"date-time":"2012-02-28T15:44:14Z","timestamp":1330443854000},"page":"480-483","source":"Crossref","is-referenced-by-count":3,"title":["A sample-and-hold circuit for 10-bit 100MS\/s pipelined ADC"],"prefix":"10.1109","author":[{"family":"Haitao Wang","sequence":"first","affiliation":[]},{"family":"Hui Hong","sequence":"additional","affiliation":[]},{"family":"Lingling Sun","sequence":"additional","affiliation":[]},{"family":"Zhiping Yu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","first-page":"134","article-title":"A 3V 340mW 14b 75MSPS CMOS ADC with 85dB SFDR at Nyquist","author":"kelly","year":"2001","journal-title":"IEEE ISSCC"},{"key":"2","first-page":"195","article-title":"A 10-b 185-MS\/s track-and-hold in 0.35-?m CMOS","volume":"36","author":"boni","year":"2001","journal-title":"IEEE JSSC"},{"key":"10","article-title":"A 1.8V 10-bit 80MS\/s Low Power Track-and-Hold Circuit in a 0.18?m CMOS Process","volume":"1","author":"sall","year":"2003","journal-title":"IEEE Circuits and Systems"},{"key":"1","first-page":"131","volume":"55 56","author":"sumanen","year":"2002","journal-title":"Pipeline Analog-to-Digital Converters for Wide-Band Wireless Communications"},{"key":"7","first-page":"163","article-title":"A CMOS sample and hold for high-speed ADCs","volume":"1","author":"brigati","year":"1996","journal-title":"IEEE Circuits and Systems"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2010.5667740"},{"key":"5","first-page":"475","article-title":"12-Bits 50MHz Pipe lined Low-Voltage ADC Design","volume":"4","author":"sun","year":"2008","journal-title":"Image Signal Process"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/4.760369"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2003.820253"},{"journal-title":"Design of Analog CMOS Integrated Circuits","year":"2000","author":"razavi","key":"8"}],"event":{"name":"2011 IEEE 9th International Conference on ASIC (ASICON 2011)","start":{"date-parts":[[2011,10,25]]},"location":"Xiamen, China","end":{"date-parts":[[2011,10,28]]}},"container-title":["2011 9th IEEE International Conference on ASIC"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6153219\/6157041\/06157226.pdf?arnumber=6157226","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T11:13:03Z","timestamp":1490094783000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6157226\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,10]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/asicon.2011.6157226","relation":{},"subject":[],"published":{"date-parts":[[2011,10]]}}}