{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T23:25:48Z","timestamp":1725492348852},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/asicon.2013.6811915","type":"proceedings-article","created":{"date-parts":[[2014,5,16]],"date-time":"2014-05-16T21:51:33Z","timestamp":1400277093000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Weight-based FPGA placement algorithm with wire effect considered"],"prefix":"10.1109","author":[{"family":"Huagang Li","sequence":"first","affiliation":[]},{"family":"Jian Wang","sequence":"additional","affiliation":[]},{"family":"Jinmei Lai","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/370155.370523"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/CADCG.2009.5246907"},{"journal-title":"Virtex-4 FPGA Data Sheet DC and Switching Characteristics","year":"2009","key":"1"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339278"},{"key":"6","article-title":"An improved simulated annealing algorithm for row-based placement","author":"sechen","year":"1987","journal-title":"ICCAD"},{"key":"5","doi-asserted-by":"crossref","DOI":"10.1126\/science.220.4598.671","article-title":"Optimization by simulated annealing","author":"kirkpatrick","year":"1983","journal-title":"Science"},{"key":"4","article-title":"Analytical placement: A linear or a quadratic objective fucntion","author":"sigl","year":"1991","journal-title":"DAC"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2006.320062"},{"key":"8","article-title":"VPR: A new packing, placement and routing tool for FPGA research","author":"betz","year":"1997","journal-title":"FPL"}],"event":{"name":"2013 IEEE 10th International Conference on ASIC (ASICON 2013)","start":{"date-parts":[[2013,10,28]]},"location":"Shenzhen, China","end":{"date-parts":[[2013,10,31]]}},"container-title":["2013 IEEE 10th International Conference on ASIC"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6805351\/6811820\/06811915.pdf?arnumber=6811915","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T13:21:49Z","timestamp":1498137709000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6811915\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/asicon.2013.6811915","relation":{},"subject":[],"published":{"date-parts":[[2013,10]]}}}