{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:31:59Z","timestamp":1729661519129,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/asicon.2013.6812067","type":"proceedings-article","created":{"date-parts":[[2014,5,16]],"date-time":"2014-05-16T17:51:33Z","timestamp":1400262693000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["Analytical model of the coupling capacitance between cylindrical through silicon via and horizontal interconnect in 3D IC"],"prefix":"10.1109","author":[{"family":"Wenjian Yu","sequence":"first","affiliation":[]},{"family":"Siyu Yang","sequence":"additional","affiliation":[]},{"family":"Qingqing Zhang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"crossref","first-page":"1873","DOI":"10.1109\/TED.2009.2026200","volume":"56","author":"savidis","year":"2009","journal-title":"IEEE Trans ED"},{"key":"2","first-page":"2321","author":"salah","year":"2011","journal-title":"International Symposium on Circuits and Systems"},{"journal-title":"Design Automation and Test in Europe Conference","year":"2009","author":"grange","key":"1"},{"journal-title":"Numerical Analysis and Algorithms","year":"2012","author":"yu","key":"10"},{"key":"7","first-page":"168","volume":"1","author":"kim","year":"2011","journal-title":"IEEE Trans CPMT"},{"key":"6","doi-asserted-by":"crossref","first-page":"256","DOI":"10.1109\/TED.2009.2034508","volume":"57","author":"katti","year":"2010","journal-title":"IEEE Trans ED"},{"key":"5","doi-asserted-by":"crossref","first-page":"3405","DOI":"10.1109\/TED.2010.2076382","volume":"57","author":"xu","year":"2010","journal-title":"IEEE Trans ED"},{"key":"4","first-page":"783","author":"liu","year":"2011","journal-title":"Design Automation Conference"},{"key":"9","doi-asserted-by":"crossref","first-page":"391","DOI":"10.1109\/EDL.1982.25610","volume":"3","author":"yuan","year":"1982","journal-title":"IEEE Electron Device Letters"},{"key":"8","doi-asserted-by":"crossref","first-page":"1862","DOI":"10.1109\/TED.2009.2026162","volume":"56","author":"zhao","year":"2009","journal-title":"IEEE Trans ED"},{"journal-title":"3D Resistance Capacitance and Inductance Extraction Tool","year":"0","key":"11"},{"key":"12","doi-asserted-by":"crossref","first-page":"2345","DOI":"10.1109\/TVLSI.2011.2176353","volume":"20","author":"mak","year":"2012","journal-title":"IEEE Trans VLSI"}],"event":{"name":"2013 IEEE 10th International Conference on ASIC (ASICON 2013)","start":{"date-parts":[[2013,10,28]]},"location":"Shenzhen, China","end":{"date-parts":[[2013,10,31]]}},"container-title":["2013 IEEE 10th International Conference on ASIC"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6805351\/6811820\/06812067.pdf?arnumber=6812067","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T09:21:50Z","timestamp":1498123310000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6812067\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/asicon.2013.6812067","relation":{},"subject":[],"published":{"date-parts":[[2013,10]]}}}