{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T14:57:36Z","timestamp":1729609056267,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,11]]},"DOI":"10.1109\/asicon.2015.7516884","type":"proceedings-article","created":{"date-parts":[[2016,7,26]],"date-time":"2016-07-26T16:38:31Z","timestamp":1469551111000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["A 0.3V-to-1.1V standard cell library in 40nm CMOS"],"prefix":"10.1109","author":[{"given":"Jintao","family":"Li","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ming","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hong","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhihua","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/EMBC.2013.6609785"},{"key":"ref3","first-page":"132","article-title":"A 28nm 0.6 V low-power DSP for mobile applications","author":"gordon","year":"2011","journal-title":"Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 2011 IEEE International"},{"key":"ref10","first-page":"47","article-title":"Optimal gate size selection for standard cells in a library","author":"vipul","year":"2006","journal-title":"Design Applications Integration and Software 2006 IEEE Dallas\/CAS Workshop on"},{"key":"ref6","first-page":"8","article-title":"Variation-driven device sizing for minimum energy sub-threshold circuits","author":"joyce","year":"2006","journal-title":"Proceedings of the 2006 International Symposium on Low Power Electronics and Design"},{"key":"ref5","first-page":"292","article-title":"A 180mV FFT processor using subthreshold circuit techniques","volume":"1","author":"alice","year":"2004","journal-title":"Solid-State Circuits Conference"},{"key":"ref8","first-page":"35","article-title":"40nm cmos 0.35 v-optimized standard cell libraries for ultra-low power applications","volume":"16","author":"fady","year":"2011","journal-title":"ACM Transactions on Design Automation of Electronic Systems"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"803","DOI":"10.1109\/JSSC.1983.1052035","article-title":"Worst-case static noise margin criteria for logic circuits and their mathematical equivalence","volume":"18","author":"jan","year":"1983","journal-title":"Solid-State Circuits IEEE Journal of"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"107","DOI":"10.1109\/JSSC.2008.2007164","article-title":"A 320 mv 56 $\\mu\\text{w}$ 411 gops\/watt ultra-low voltage motion estimation accelerator in 65 nm cmos","volume":"44","author":"himanshu","year":"2009","journal-title":"Solid-State Circuits IEEE Journal of"},{"key":"ref9","first-page":"32","article-title":"A Standard Cell Optimization Method for Near-Threshold Voltage Operations","author":"masahiro","year":"2013","journal-title":"Integrated Circuit and System Design Power and Timing Modeling Optimization and Simulation"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"237","DOI":"10.1109\/JPROC.2009.2035453","article-title":"Ultralow-power design in near-threshold region","volume":"98","author":"markovi?","year":"2010","journal-title":"Proceedings of the IEEE"}],"event":{"name":"2015 IEEE 11th International Conference on ASIC (ASICON )","start":{"date-parts":[[2015,11,3]]},"location":"Chengdu, China","end":{"date-parts":[[2015,11,6]]}},"container-title":["2015 IEEE 11th International Conference on ASIC (ASICON)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7506193\/7516874\/07516884.pdf?arnumber=7516884","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T15:15:12Z","timestamp":1498317312000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7516884\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,11]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/asicon.2015.7516884","relation":{},"subject":[],"published":{"date-parts":[[2015,11]]}}}