{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T14:16:16Z","timestamp":1725632176137},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,11]]},"DOI":"10.1109\/asicon.2015.7516950","type":"proceedings-article","created":{"date-parts":[[2016,7,26]],"date-time":"2016-07-26T20:38:31Z","timestamp":1469565511000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Exploring stacked main memory architecture for 3D GPGPUs"],"prefix":"10.1109","author":[{"given":"Yuang","family":"Zhang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Li","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Axel","family":"Jantsch","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhonghai","family":"Lu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Minglun","family":"Gao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yuxiang","family":"Fu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hongbing","family":"Pan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2541228.2541231"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.15"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228477"},{"key":"ref13","first-page":"611","article-title":"Analysis and runtime management of 3D systems with stacked DRAM for boosting energy efficiency","author":"meng","year":"2012","journal-title":"Design Automation Test in Europe Conference Exhibition"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2074070"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024772"},{"key":"ref6","first-page":"33","article-title":"CACTI-3DD: architecture-level modeling for 3D die-stacked DRAM main memory","author":"chen","year":"2012","journal-title":"Design Automation Test in Europe Conference Exhibition"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"journal-title":"IMPACT Technical Report IMPACT-12-01 University of Illinois at Urbana-Champaign","year":"2012","author":"stratton","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2010.5650274"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2012.6189213"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.31"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2009.5413147"}],"event":{"name":"2015 IEEE 11th International Conference on ASIC (ASICON )","start":{"date-parts":[[2015,11,3]]},"location":"Chengdu, China","end":{"date-parts":[[2015,11,6]]}},"container-title":["2015 IEEE 11th International Conference on ASIC (ASICON)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7506193\/7516874\/07516950.pdf?arnumber=7516950","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T16:36:28Z","timestamp":1489768588000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7516950\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,11]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/asicon.2015.7516950","relation":{},"subject":[],"published":{"date-parts":[[2015,11]]}}}