{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T02:50:49Z","timestamp":1729651849552,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,11]]},"DOI":"10.1109\/asicon.2015.7517072","type":"proceedings-article","created":{"date-parts":[[2016,7,26]],"date-time":"2016-07-26T16:38:31Z","timestamp":1469551111000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["A method of automatic sizing logic driver of 16nm Fin-FET"],"prefix":"10.1109","author":[{"given":"ZengFa","family":"Peng","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"JianBin","family":"Zheng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"AiLin","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/SOI.2009.5318794"},{"key":"ref3","first-page":"67","article-title":"Sub 50-nm FinFET: PMOS","author":"huang","year":"1999","journal-title":"International Electron Devices Meeting Technical Digest"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1077603.1077628"},{"key":"ref6","first-page":"251","article-title":"FinFET scaling to 10nm gate length","author":"yu","year":"2002","journal-title":"International Electron Devices Meeting Technical Digest"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/16.75219"},{"key":"ref5","first-page":"421","article-title":"Sub &#x2014; 20nm CMOS FinFET technologies","author":"choi","year":"2001","journal-title":"IEEE International Electron Devices Meeting Technical Digest"},{"key":"ref8","article-title":"Performance comparison of CMOS and FINFET based SRAM for 22nm Technology","volume":"1","author":"cyril prasanna","year":"2013","journal-title":"International journal of conceptions on electronics and communication engineering"},{"key":"ref7","article-title":"Reliability Study on Technology Trends Beyond 20nm","author":"amat","year":"2013","journal-title":"MIXDES 2013 20th International Conference &#x201C;Mixed Design of Integrated Circuits and Systems&#x201D;"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/GLSV.1996.497614"},{"key":"ref9","first-page":"218","article-title":"Design and Implementation of 32nm FINFET based $4 \\times 4$ SRAM cell array using 1-bit 6T SRAM","author":"lourts deepak","year":"2011","journal-title":"Proceedings of the International Conference on Nanoscience and Technology"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"47","DOI":"10.1142\/9789812830470_0003","volume":"6","author":"yeap","year":"1996","journal-title":"Low Power VLSI Design and Technology"}],"event":{"name":"2015 IEEE 11th International Conference on ASIC (ASICON )","start":{"date-parts":[[2015,11,3]]},"location":"Chengdu, China","end":{"date-parts":[[2015,11,6]]}},"container-title":["2015 IEEE 11th International Conference on ASIC (ASICON)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7506193\/7516874\/07517072.pdf?arnumber=7517072","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T15:15:15Z","timestamp":1498317315000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7517072\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,11]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/asicon.2015.7517072","relation":{},"subject":[],"published":{"date-parts":[[2015,11]]}}}