{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:49:30Z","timestamp":1730198970124,"version":"3.28.0"},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,11]]},"DOI":"10.1109\/asicon.2015.7517168","type":"proceedings-article","created":{"date-parts":[[2016,7,26]],"date-time":"2016-07-26T16:38:31Z","timestamp":1469551111000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["An automatic translation and parallelization system for general purpose reconfigurable processor"],"prefix":"10.1109","author":[{"given":"Fengshuo","family":"Tian","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Weiguang","family":"Sheng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Weifeng","family":"He","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/125826.125848"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/BF01407931"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1375581.1375595"},{"key":"ref5","first-page":"311","article-title":"The loop parallelizer LooPo[C]","volume":"21","author":"griebl","year":"1996","journal-title":"Proc Sixth Workshop on Compilers for Parallel Computers Konferenzen des Forschungszentrums Jülich"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2010.5470423"},{"key":"ref7","first-page":"10","article-title":"Generating loops for scanning polyhedra: Cloog user's guide[J]","volume":"2","author":"bastoul","year":"2004","journal-title":"Polyhedron"},{"journal-title":"Parallel Programming in OpenMP","year":"2001","author":"chandra","key":"ref2"},{"journal-title":"Compute Unified Device Architecture Programming Guide","year":"2007","author":"nvidia","key":"ref1"}],"event":{"name":"2015 IEEE 11th International Conference on ASIC (ASICON )","start":{"date-parts":[[2015,11,3]]},"location":"Chengdu, China","end":{"date-parts":[[2015,11,6]]}},"container-title":["2015 IEEE 11th International Conference on ASIC (ASICON)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7506193\/7516874\/07517168.pdf?arnumber=7517168","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T12:38:57Z","timestamp":1489754337000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7517168\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,11]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/asicon.2015.7517168","relation":{},"subject":[],"published":{"date-parts":[[2015,11]]}}}