{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:51:33Z","timestamp":1725666693573},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,10]]},"DOI":"10.1109\/asicon.2017.8252635","type":"proceedings-article","created":{"date-parts":[[2018,1,17]],"date-time":"2018-01-17T22:22:30Z","timestamp":1516227750000},"page":"953-956","source":"Crossref","is-referenced-by-count":3,"title":["Parallel implementations of SHA-3 on a 24-core processor with software and hardware co-design"],"prefix":"10.1109","author":[{"given":"Jianwei","family":"Yang","sequence":"first","affiliation":[]},{"given":"Weizhen","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Zhicheng","family":"Xie","sequence":"additional","affiliation":[]},{"given":"Jun","family":"Han","sequence":"additional","affiliation":[]},{"given":"Zhiyi","family":"Yu","sequence":"additional","affiliation":[]},{"given":"Xiaoyang","family":"Zeng","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","article-title":"Comprehensive evaluation of high-speed and medium-speed implementations of five SHA-3 finalists using Xilinx and Altera FPGAs","author":"gaj","year":"2012","journal-title":"Third SHA-3 Candidate Conference"},{"key":"ref3","article-title":"Comparative Performance Review of the SHA- 3 Second Round Candidates","author":"pornin","year":"2010","journal-title":"The Second SHA-3 Candidate Conference"},{"journal-title":"eBACS ECRYPT Benchmarking of Cryptographic Systems","year":"0","author":"bernstein","key":"ref6"},{"key":"ref5","first-page":"56","author":"ou","year":"0","journal-title":"A 65nm 39GOPS\/w 24-core processor with 11Tb\/s\/W packet-controlled circuit-switched double-layer network-on-chip and heterogeneous execution array"},{"journal-title":"Keccak Sponge Function Family Main Document","year":"2010","author":"bertoni","key":"ref2"},{"journal-title":"FIPS PUB 202","year":"2015","key":"ref1"}],"event":{"name":"2017 IEEE 12th International Conference on ASIC (ASICON)","start":{"date-parts":[[2017,10,25]]},"location":"Guiyang","end":{"date-parts":[[2017,10,28]]}},"container-title":["2017 IEEE 12th International Conference on ASIC (ASICON)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8240668\/8252386\/08252635.pdf?arnumber=8252635","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,2,15]],"date-time":"2018-02-15T15:55:59Z","timestamp":1518710159000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8252635\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,10]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/asicon.2017.8252635","relation":{},"subject":[],"published":{"date-parts":[[2017,10]]}}}