{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:59:51Z","timestamp":1759147191248,"version":"3.44.0"},"reference-count":32,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,10,1]],"date-time":"2019-10-01T00:00:00Z","timestamp":1569888000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,10,1]],"date-time":"2019-10-01T00:00:00Z","timestamp":1569888000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,10]]},"DOI":"10.1109\/asicon47005.2019.8983622","type":"proceedings-article","created":{"date-parts":[[2020,2,7]],"date-time":"2020-02-07T01:04:26Z","timestamp":1581037466000},"page":"1-4","source":"Crossref","is-referenced-by-count":2,"title":["OpenMPL: An Open Source Layout Decomposer: Invited Paper"],"prefix":"10.1109","author":[{"given":"Wei","family":"Li","sequence":"first","affiliation":[{"name":"The Chinese University of Hong Kong"}]},{"given":"Yuzhe","family":"Ma","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong"}]},{"given":"Qi","family":"Sun","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong"}]},{"given":"Yibo","family":"Lin","sequence":"additional","affiliation":[{"name":"Peking University"}]},{"given":"Iris Hui-Ru","family":"Jiang","sequence":"additional","affiliation":[{"name":"National Taiwan University"}]},{"given":"Bei","family":"Yu","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong"}]},{"given":"David Z.","family":"Pan","sequence":"additional","affiliation":[{"name":"University of Texas at Austin"}]}],"member":"263","reference":[{"journal-title":"Boost C++ Library","year":"0","key":"ref32"},{"journal-title":"OpenMP","year":"0","key":"ref31"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1080\/10556789908805765"},{"key":"ref10","first-page":"11002","article-title":"Triple patterning lithography layout decomposition using end-cutting","volume":"14","author":"yu","year":"2015","journal-title":"JM3"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1117\/1.JMM.16.2.023507"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2582154"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2288678"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2717764.2717768"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429396"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062250"},{"key":"ref17","article-title":"Layout compliance for triple patterning lithography: an iterative approach","volume":"9235","author":"yu","year":"0","journal-title":"Proc SPIE"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488818"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691115"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-13075-0_29"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2017.8203477"},{"journal-title":"CBC","year":"0","key":"ref27"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2747940"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2048374"},{"key":"ref29","first-page":"53:1","article-title":"Layout decomposition for quadruple patterning lithography and beyond","author":"yu","year":"0","journal-title":"Proc DAC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687511"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2387840"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2035577"},{"key":"ref2","article-title":"Layout optimization for integrated circuit design","author":"chen","year":"2017","journal-title":"US Patent"},{"key":"ref9","first-page":"163","article-title":"A highperformance triple patterning layout decomposer with balanced density","author":"yu","year":"0","journal-title":"Proc ICCAD"},{"journal-title":"OpenMP","year":"0","key":"ref1"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898048"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203763"},{"key":"ref21","article-title":"A fast triple-patterning solution with fix guidance","volume":"9053","author":"fang","year":"0","journal-title":"Proc SPIE"},{"journal-title":"Limbo","year":"0","key":"ref24"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2401571"},{"journal-title":"LEMON","year":"0","key":"ref26"},{"journal-title":"Gurobi Optimizer Reference Manual","year":"2016","key":"ref25"}],"event":{"name":"2019 IEEE 13th International Conference on ASIC (ASICON)","start":{"date-parts":[[2019,10,29]]},"location":"Chongqing, China","end":{"date-parts":[[2019,11,1]]}},"container-title":["2019 IEEE 13th International Conference on ASIC (ASICON)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8963812\/8983425\/08983622.pdf?arnumber=8983622","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T19:23:25Z","timestamp":1756754605000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8983622\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,10]]},"references-count":32,"URL":"https:\/\/doi.org\/10.1109\/asicon47005.2019.8983622","relation":{},"subject":[],"published":{"date-parts":[[2019,10]]}}}