{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:49:42Z","timestamp":1730198982925,"version":"3.28.0"},"reference-count":29,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,1]]},"DOI":"10.1109\/asp-dac47756.2020.9045410","type":"proceedings-article","created":{"date-parts":[[2020,3,27]],"date-time":"2020-03-27T08:27:10Z","timestamp":1585297630000},"page":"414-421","source":"Crossref","is-referenced-by-count":0,"title":["Emerging memories as enablers for in-memory layout transformation acceleration and virtualization"],"prefix":"10.1109","author":[{"given":"Minli","family":"Liao","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jack","family":"Sampson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2010.5452013"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2009.5424368"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2012.2206051"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1555815.1555760"},{"key":"ref14","first-page":"1","article-title":"A stackable cross point phase change memory","author":"kau","year":"2009","journal-title":"2009 IEEE International Electron Devices Meeting (IEDM)"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"405","DOI":"10.1021\/nl071804g","article-title":"Use of negative capacitance to provide voltage amplification for low power nanoscale devices","volume":"8","author":"salahuddin","year":"2008","journal-title":"Nano Letters"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898050"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2787562"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.029"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870354"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/502874.502897"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HPEC.2014.7040954"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2013.6495008"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830820"},{"journal-title":"Deep Neural Network Library (DNNL)","year":"2019","key":"ref6"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.23"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750397"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2620475"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2215121"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00051"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/264107.264152"},{"key":"ref1","first-page":"842","article-title":"Mdacache:caching for multi-dimensional-access memories","author":"george","year":"2018","journal-title":"IEEE\/ACM International Symposium on Microarchitecture (MICRO)"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/565816.503287"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/BFb0057885"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2247684.2247699"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155677"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/1375657.1375664"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/1375581.1375595"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/76263.76337"}],"event":{"name":"2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC)","start":{"date-parts":[[2020,1,13]]},"location":"Beijing, China","end":{"date-parts":[[2020,1,16]]}},"container-title":["2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9036752\/9045099\/09045410.pdf?arnumber=9045410","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T11:39:50Z","timestamp":1656329990000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9045410\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,1]]},"references-count":29,"URL":"https:\/\/doi.org\/10.1109\/asp-dac47756.2020.9045410","relation":{},"subject":[],"published":{"date-parts":[[2020,1]]}}}