{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,3]],"date-time":"2025-12-03T18:00:03Z","timestamp":1764784803111},"reference-count":25,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,1,17]],"date-time":"2022-01-17T00:00:00Z","timestamp":1642377600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,1,17]],"date-time":"2022-01-17T00:00:00Z","timestamp":1642377600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,1,17]]},"DOI":"10.1109\/asp-dac52403.2022.9712492","type":"proceedings-article","created":{"date-parts":[[2022,2,21]],"date-time":"2022-02-21T22:39:17Z","timestamp":1645483157000},"source":"Crossref","is-referenced-by-count":3,"title":["Data Leakage through Self-Terminated Write Schemes in Memristive Caches"],"prefix":"10.1109","author":[{"given":"Jonas","family":"Krautter","sequence":"first","affiliation":[{"name":"Institute of Computer Engineering, Karlsruhe Institute of Technology (KIT),Karlsruhe,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mahta","family":"Mayahinia","sequence":"additional","affiliation":[{"name":"Institute of Computer Engineering, Karlsruhe Institute of Technology (KIT),Karlsruhe,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dennis R.E.","family":"Gnad","sequence":"additional","affiliation":[{"name":"Institute of Computer Engineering, Karlsruhe Institute of Technology (KIT),Karlsruhe,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mehdi B.","family":"Tahoori","sequence":"additional","affiliation":[{"name":"Institute of Computer Engineering, Karlsruhe Institute of Technology (KIT),Karlsruhe,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2014.2322387"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417918"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662444"},{"key":"ref13","first-page":"101","article-title":"Minimizing write activities to non-volatile memory via scheduling and recomputation","author":"hu","year":"2010","journal-title":"Symposium on Application Specific Processors (SASP'08)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2016.2541629"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1088\/1361-6463\/ab7794"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1063\/1.5108654"},{"key":"ref17","first-page":"31.6.1","article-title":"10x10nm2 hf\/hfox crossbar resistive ram with excellent performance, reliability and low-energy operation","author":"govoreanu","year":"2011","journal-title":"International Electron Devices Meeting (IEDM)"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1506409.1506429"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2937817"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2017.2746342"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2014.6783375"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927083"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2017.8268468"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2016.7684086"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2016.2583419"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614606"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.14"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310393"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2940449"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333665"},{"key":"ref23","author":"bienia","year":"2011","journal-title":"Benchmarking Modern Multiprocessors"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927049"}],"event":{"name":"2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)","location":"Taipei, Taiwan","start":{"date-parts":[[2022,1,17]]},"end":{"date-parts":[[2022,1,20]]}},"container-title":["2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9712466\/9712479\/09712492.pdf?arnumber=9712492","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,13]],"date-time":"2022-06-13T21:08:40Z","timestamp":1655154520000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9712492\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,1,17]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1109\/asp-dac52403.2022.9712492","relation":{},"subject":[],"published":{"date-parts":[[2022,1,17]]}}}