{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T15:53:32Z","timestamp":1780674812094,"version":"3.54.1"},"reference-count":25,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,1,17]],"date-time":"2022-01-17T00:00:00Z","timestamp":1642377600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,1,17]],"date-time":"2022-01-17T00:00:00Z","timestamp":1642377600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000185","name":"DARPA","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["1628926"],"award-info":[{"award-number":["1628926"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,1,17]]},"DOI":"10.1109\/asp-dac52403.2022.9712564","type":"proceedings-article","created":{"date-parts":[[2022,2,21]],"date-time":"2022-02-21T22:39:17Z","timestamp":1645483157000},"page":"154-159","source":"Crossref","is-referenced-by-count":8,"title":["Generalizing Tandem Simulation: Connecting High-level and RTL Simulation Models"],"prefix":"10.1109","author":[{"given":"Yue","family":"Xing","sequence":"first","affiliation":[{"name":"Princeton University,Princeton,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Aarti","family":"Gupta","sequence":"additional","affiliation":[{"name":"Princeton University,Princeton,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sharad","family":"Malik","sequence":"additional","affiliation":[{"name":"Princeton University,Princeton,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","author":"hsing","year":"2014","journal-title":"Opencores org tiny aes"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3107953"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218516"},{"key":"ref13","author":"wolf","year":"2020","journal-title":"Picorv32"},{"key":"ref14","year":"2020","journal-title":"BlueSpec RISC-V designs"},{"key":"ref15","author":"asanovic","year":"2016","journal-title":"The rocket chip generator"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2009.5335656"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474194"},{"key":"ref18","author":"snyder","year":"2009","journal-title":"Verilator"},{"key":"ref19","year":"2020","journal-title":"Accellera Systems Initiative"},{"key":"ref4","author":"nikhil","year":"2015","journal-title":"RISC-V at Bluespec"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ETSYM.2010.5512761"},{"key":"ref6","first-page":"68","article-title":"Automatic verification of pipelined micro-processor control","author":"burch","year":"1994","journal-title":"CAV"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2996145"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-17462-0_21"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1367045.1367054"},{"key":"ref2","first-page":"19","article-title":"Transaction Level Modeling: An Overview","author":"cai","year":"2003","journal-title":"1st CODES+ISSS"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3282444"},{"key":"ref1","author":"gr\u00f6tker","year":"2007","journal-title":"System Design with SystemC"},{"key":"ref20","first-page":"69","article-title":"Bluespec System Verilog: efficient, correct RTL from high level specifications","author":"nikhil","year":"2004","journal-title":"MEMOCODE"},{"key":"ref22","year":"0","journal-title":"Dromajo"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228584"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.243898"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1147\/rd.494.0541"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2013.208"}],"event":{"name":"2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)","location":"Taipei, Taiwan","start":{"date-parts":[[2022,1,17]]},"end":{"date-parts":[[2022,1,20]]}},"container-title":["2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9712466\/9712479\/09712564.pdf?arnumber=9712564","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,13]],"date-time":"2022-06-13T21:08:22Z","timestamp":1655154502000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9712564\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,1,17]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1109\/asp-dac52403.2022.9712564","relation":{},"subject":[],"published":{"date-parts":[[2022,1,17]]}}}