{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T20:58:46Z","timestamp":1725742726773},"reference-count":30,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,1,22]],"date-time":"2024-01-22T00:00:00Z","timestamp":1705881600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,1,22]],"date-time":"2024-01-22T00:00:00Z","timestamp":1705881600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,1,22]]},"DOI":"10.1109\/asp-dac58780.2024.10473890","type":"proceedings-article","created":{"date-parts":[[2024,3,25]],"date-time":"2024-03-25T19:06:53Z","timestamp":1711393613000},"page":"333-340","source":"Crossref","is-referenced-by-count":0,"title":["Sensors for Remote Power Attacks: New Developments and Challenges"],"prefix":"10.1109","author":[{"given":"Brian","family":"Udugama","sequence":"first","affiliation":[{"name":"University of New South Wales,School of Computer Science and Engineering,Sydney,Australia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Darshana","family":"Jayasinghe","sequence":"additional","affiliation":[{"name":"University of Sydney,School of Electrical and Computer Engineering,Sydney,Australia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sri","family":"Parameswaran","sequence":"additional","affiliation":[{"name":"University of Sydney,School of Electrical and Computer Engineering,Sydney,Australia"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-40349-1_10"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00002"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-48405-1_25"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342177"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116481"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig48160.2019.8994789"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942094"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2022.i1.657-678"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2022.i4.589-613"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2023.i2.543-567"},{"volume-title":"Announcing the ADVANCED ENCRYPTION STANDARD (AES)","year":"2001","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-28632-5_2"},{"volume-title":"Virtex-6 FPGA SelectIO Resources User Guide (UG361)","year":"2014","key":"ref13"},{"volume-title":"Cyclone IV Device Handbook - I\/O Features in Cyclone IV Devices","year":"2016","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2020.i3.121-146"},{"volume-title":"Spartan-6 Libraries Guide for HDL Designs","year":"2013","key":"ref16"},{"volume-title":"100 Power Tips For FPGA Designers","year":"2011","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2435264.2435283"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2133352.2133353"},{"volume-title":"Vivado Design Suite User Guide: Programming and Debugging (UG908)","year":"2023","key":"ref20"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/EUASIC.1991.212842"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/springerreference_13370"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1049\/el.2019.0163"},{"volume-title":"Spartan-6 FPGA Data Sheet:DC and Switching Characteristics","year":"2015","key":"ref24"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681650"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2017.25"},{"key":"ref27","doi-asserted-by":"crossref","DOI":"10.1145\/3316781.3317899","article-title":"RFTC: Runtime Frequency Tuning Countermeasure Using FPGA Dynamic Reconfiguration to Mitigate Power Analysis Attacks","volume-title":"Proceedings of the 56th Annual Design Automation Conference 2019","author":"Jayasinghe"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942112"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2043382"},{"key":"ref30","doi-asserted-by":"crossref","DOI":"10.1145\/2429384.2429392","article-title":"Experimental Analysis of a Ring Oscillator Network for Hardware Trojan Detection in a 90nm ASIC","volume-title":"Proceedings of the International Conference on Computer-Aided Design","author":"Ferraiuolo"}],"event":{"name":"2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)","start":{"date-parts":[[2024,1,22]]},"location":"Incheon, Korea, Republic of","end":{"date-parts":[[2024,1,25]]}},"container-title":["2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10473777\/10473787\/10473890.pdf?arnumber=10473890","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,26]],"date-time":"2024-03-26T22:03:48Z","timestamp":1711490628000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10473890\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,1,22]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/asp-dac58780.2024.10473890","relation":{},"subject":[],"published":{"date-parts":[[2024,1,22]]}}}