{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,12]],"date-time":"2026-03-12T13:03:40Z","timestamp":1773320620646,"version":"3.50.1"},"reference-count":36,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,1,19]],"date-time":"2026-01-19T00:00:00Z","timestamp":1768780800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,1,19]],"date-time":"2026-01-19T00:00:00Z","timestamp":1768780800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,1,19]]},"DOI":"10.1109\/asp-dac66049.2026.11420553","type":"proceedings-article","created":{"date-parts":[[2026,3,10]],"date-time":"2026-03-10T19:51:15Z","timestamp":1773172275000},"page":"1244-1251","source":"Crossref","is-referenced-by-count":0,"title":["RTL Verification for Secure Speculation Using Cascaded Two-Phase Information Flow Tracking"],"prefix":"10.1109","author":[{"given":"Yuhao","family":"Liu","sequence":"first","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ying","family":"Li","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yinhao","family":"Zhou","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chang","family":"Guo","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhenfeng","family":"Li","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yanyun","family":"Lu","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics of the Chinese Academy of Sciences"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3399742"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3357033"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.5555\/3277203.3277277"},{"key":"ref4","article-title":"Retpoline: a software construct for preventing branch-target injection","year":"2018","journal-title":"Google"},{"key":"ref5","article-title":"Indirect branch restricted speculation","year":"2018","journal-title":"Intel"},{"key":"ref6","article-title":"Vulnerability of Speculative Processors","year":"2018","journal-title":"ARM"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00011"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/CSF.2019.00027"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00081"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589094"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218572"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3669940.3707243"},{"key":"ref13","first-page":"1","article-title":"Sonicboom: The 3rd generation berkeley out-of-order machine","volume-title":"Fourth Workshop on Computer Architecture Research with RISC-V","volume":"5","author":"Zhao"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3447867"},{"key":"ref15","first-page":"971","article-title":"Branch history injection: On the effectiveness of hardware mitigations against cross-privilege spectre-v2 attacks","volume-title":"31st USENIX Security Symposium","author":"Barberis"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3243734.3243761"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2024.3352537"},{"key":"ref18","article-title":"Speculative execution, variant 4: Speculative store bypass","author":"Horn"},{"key":"ref19","first-page":"955","article-title":"Translation leak-aside buffer: Defeating cache side-channel protections with tlb attacks","volume-title":"27th USENIX Security Symposium (USENIX Security","volume":"18","author":"Gras"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3319535.3363194"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546693"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2664243.2664273"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3282444"},{"key":"ref24","article-title":"Jasper Formal Property Verification App","journal-title":"Cadence"},{"key":"ref25","first-page":"2549","article-title":"Cellift: Leveraging cells for scalable and precise dynamic information flow tracking in rtl","volume-title":"31st USENIX Security Symposium (USENIX Security","volume":"22","author":"Solt"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3676536.3676658"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927266"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-16214-0_42"},{"key":"ref29","article-title":"Simpleooo"},{"key":"ref30","article-title":"Risc-v dynamic execution core"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358274"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323843"},{"key":"ref33","first-page":"723","article-title":"Efficient invisible speculative execution through selective delay and value prediction","volume-title":"Proceedings of the 46th International Symposium on Computer Architecture","author":"Sakalis"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/3445814.3446708"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3385897"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/3548606.3560578"}],"event":{"name":"2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC)","location":"Lantau, Hong Kong","start":{"date-parts":[[2026,1,19]]},"end":{"date-parts":[[2026,1,22]]}},"container-title":["2026 31st Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11420221\/11420229\/11420553.pdf?arnumber=11420553","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T19:35:56Z","timestamp":1773257756000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11420553\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1,19]]},"references-count":36,"URL":"https:\/\/doi.org\/10.1109\/asp-dac66049.2026.11420553","relation":{},"subject":[],"published":{"date-parts":[[2026,1,19]]}}}