{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,31]],"date-time":"2025-05-31T09:23:37Z","timestamp":1748683417973,"version":"3.28.0"},"reference-count":33,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,1]]},"DOI":"10.1109\/aspdac.2011.5722180","type":"proceedings-article","created":{"date-parts":[[2011,3,5]],"date-time":"2011-03-05T12:54:28Z","timestamp":1299329668000},"page":"176-183","source":"Crossref","is-referenced-by-count":22,"title":["Equivalent lumped element models for various n-port Through Silicon Vias networks"],"prefix":"10.1109","author":[{"given":"Khaled","family":"Salah","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hani","family":"Ragai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yehea","family":"Ismail","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alaa El","family":"Rouby","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"year":"0","key":"ref33"},{"year":"0","key":"ref32"},{"year":"0","key":"ref31"},{"journal-title":"Applied Dimensional Analysis and Modeling","year":"1997","author":"szirtes","key":"ref30"},{"key":"ref10","article-title":"High RF Performance TSV Silicon Carrier for High Frequency Application","author":"ho","year":"0","journal-title":"Electronic Components and Technology Conference"},{"key":"ref11","article-title":"Modeling and Evaluation for Electrical Characteristics of Through-Strata-Vias (TSVs) in Three-Dimensional Integration","author":"beece","year":"0","journal-title":"3D System Integration 2009 3DIC 2009 IEEE International Conference on"},{"key":"ref12","article-title":"Active Circuit to Through Silicon Via (TSV) Noise Coupling","author":"shim","year":"0","journal-title":"Electrical Performance of Electronic Packaging and Systems 2009 EPEPS &#x2019;09 IEEE 18th Conference"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/EPEPS.2009.5338488"},{"key":"ref14","article-title":"Through-silicon via based 3D IC technology: Electrostatic simulations for design methodology","author":"rousseau","year":"0","journal-title":"IMAPS Device Packaging Conference"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2008.4541535"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2009.2026200"},{"key":"ref17","article-title":"Closed-form Equations for Through-Silicon Via (TSV) Parasitics in 3-D Integrated Circuits (ICs)","author":"weerasekera","year":"2009","journal-title":"Proc Workshop 3-D Integr DATE Conf"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306547"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306592"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1002\/mop.23173"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2007.4397268"},{"year":"0","key":"ref27"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/5.929647"},{"key":"ref6","first-page":"351","article-title":"Electrical Characterization of Through Silicon Via (TSV) depending on Structural and Material Parameters based on 3D Full Wave Simulation","author":"pak","year":"0","journal-title":"Electromagnetic Electronic Materials and Packaging 2007 Conf"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2004.1319378"},{"key":"ref5","first-page":"151","article-title":"High frequency electrical circuit model of chip-to-chip vertical via interconnection for 3-D chip stacking package","author":"ryu","year":"2005","journal-title":"Proc 14th Topical Meeting on Electrical Performance of Electronic Packaging"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2007.373897"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ESTC.2006.280001"},{"key":"ref2","first-page":"26","article-title":"TSVaware Interconnect Length and Power Prediction for 3D Stacked ICs","author":"kim","year":"0","journal-title":"IEEE International Interconnect Technology Conference"},{"article-title":"Multi-Stacked Through-Silicon- Via Effects on Signal Integrity and Power In tegrity for Application of 3-Dimensional Stacked-Chip-Package","year":"0","author":"ryu","key":"ref9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306541"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306542"},{"key":"ref22","article-title":"Electrical Modeling and Characterization of Through Silicon via for Three-Dimensional ICs","volume":"57","author":"stucchi","year":"2010","journal-title":"IEEE Transactions on Electron Devices"},{"key":"ref21","article-title":"Compact AC Modeling and Analysis of Cu, W, and CNT based Through-Silicon Vias (TSVs) in 3-D ICs","author":"xu","year":"2009","journal-title":"IEDM09&#x2013;521"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2009.10.006"},{"key":"ref23","first-page":"553","article-title":"Analytical model for the propagation delay of through silicon vias","author":"khali","year":"2008","journal-title":"Proc IEEE Int Symp Qual Electron Des"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/SPI.2009.5089849"},{"key":"ref25","article-title":"Closed-Form Equations for Through-Silicon Via(TSV) Parasitics in 3-D Integrated Circuits","author":"weerasekera","year":"2009","journal-title":"Proc Workshop 3-D Integr DATE Conf"}],"event":{"name":"2011 16th Asia and South Pacific Design Automation Conference ASP-DAC 2011","start":{"date-parts":[[2011,1,25]]},"location":"Yokohama, Japan","end":{"date-parts":[[2011,1,28]]}},"container-title":["16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5716646\/5722157\/05722180.pdf?arnumber=5722180","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T03:48:07Z","timestamp":1490068087000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5722180\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,1]]},"references-count":33,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2011.5722180","relation":{},"subject":[],"published":{"date-parts":[[2011,1]]}}}