{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:47:50Z","timestamp":1730198870861,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,1]]},"DOI":"10.1109\/aspdac.2013.6509577","type":"proceedings-article","created":{"date-parts":[[2013,5,3]],"date-time":"2013-05-03T19:36:53Z","timestamp":1367609813000},"page":"103-104","source":"Crossref","is-referenced-by-count":4,"title":["Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges"],"prefix":"10.1109","author":[{"given":"K.","family":"Niitsu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Harigai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Hirabayashi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Oki","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Sakurai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"O.","family":"Kobayashi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T. J.","family":"Yamaguchi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H.","family":"Kobayashi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","first-page":"142","author":"niitsu","year":"2012","journal-title":"Symp on VLSI"},{"year":"0","key":"2"},{"year":"0","key":"1"},{"key":"7","first-page":"2758","volume":"42","author":"khalil","year":"2007","journal-title":"JSSC"},{"key":"6","first-page":"632","volume":"34","author":"garlepp","year":"1999","journal-title":"JSSC"},{"key":"5","first-page":"2701","volume":"47","author":"niitsu","year":"2012","journal-title":"JSSC"},{"key":"4","first-page":"870","volume":"32","author":"mcneil","year":"1997","journal-title":"JSSC"}],"event":{"name":"2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013)","start":{"date-parts":[[2013,1,22]]},"location":"Yokohama","end":{"date-parts":[[2013,1,25]]}},"container-title":["2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6507004\/6509548\/06509577.pdf?arnumber=6509577","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T00:33:16Z","timestamp":1490229196000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6509577\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,1]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2013.6509577","relation":{},"subject":[],"published":{"date-parts":[[2013,1]]}}}