{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,20]],"date-time":"2026-06-20T16:20:44Z","timestamp":1781972444965,"version":"3.54.5"},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,1]]},"DOI":"10.1109\/aspdac.2013.6509587","type":"proceedings-article","created":{"date-parts":[[2013,5,3]],"date-time":"2013-05-03T23:36:53Z","timestamp":1367624213000},"page":"145-150","source":"Crossref","is-referenced-by-count":55,"title":["Improving the mapping of reversible circuits to quantum circuits using multiple target lines"],"prefix":"10.1109","author":[{"given":"R.","family":"Wille","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"M.","family":"Soeken","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"C.","family":"Otterstedt","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"R.","family":"Drechsler","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"crossref","first-page":"703","DOI":"10.1109\/TCAD.2009.2017215","article-title":"Exact multiple-control Toffoli network synthesis with sat techniques","volume":"28","author":"gro\ufffde","year":"2009","journal-title":"IEEE Trans on CAD"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1145\/1366110.1366168"},{"key":"18","first-page":"318","article-title":"A transformation based algorithm for reversible logic synthesis","author":"miller","year":"2003","journal-title":"ACM Design Automation Conf"},{"key":"15","doi-asserted-by":"crossref","first-page":"632","DOI":"10.1007\/3-540-10003-2_104","article-title":"Reversible computing","volume":"85","author":"toffoli","year":"1980","journal-title":"Automata Languages and Programming Ser Lecture Notes in Computer Science"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228368"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.249"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2011.54"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6165069"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.52.3457"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2008.43"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/SFCS.1994.365700"},{"key":"20","first-page":"64","article-title":"RevKit: An open source toolkit for the design of reversible circuits","volume":"7165","author":"soeken","year":"2012","journal-title":"Reversible Computation 2011 Ser Lecture Notes in Computer Science"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/237814.237866"},{"key":"1","author":"nielsen","year":"2000","journal-title":"Quantum Computation and Quantum Information"},{"key":"10","doi-asserted-by":"crossref","first-page":"151","DOI":"10.1007\/978-3-642-20520-0_16","article-title":"Improving ESOP-based synthesis of reversible logic using evolutionary algorithms","author":"drechsler","year":"2011","journal-title":"Applications of Evolutionary Computation"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2003.811448"},{"key":"6","article-title":"Towards a scalable superconducting qubit architecture","author":"steffen","year":"2012","journal-title":"Amer Phys Soc March Meeting"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1038\/414883a"},{"key":"4","doi-asserted-by":"crossref","first-page":"446","DOI":"10.1007\/978-3-540-46588-1_30","article-title":"Selecting cryptographic key sizes","author":"lenstra","year":"2000","journal-title":"International Workshop on Practice and Theory in Public Key Cryptography"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/PACRIM.2007.4313212"},{"key":"8","doi-asserted-by":"crossref","first-page":"270","DOI":"10.1145\/1629911.1629984","article-title":"bdd-based synthesis of reversible logic for large functions","author":"wille","year":"2009","journal-title":"2009 46th ACM\/IEEE Design Automation Conference dac"}],"event":{"name":"2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013)","location":"Yokohama","start":{"date-parts":[[2013,1,22]]},"end":{"date-parts":[[2013,1,25]]}},"container-title":["2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6507004\/6509548\/06509587.pdf?arnumber=6509587","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T12:31:16Z","timestamp":1498048276000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6509587\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,1]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2013.6509587","relation":{},"subject":[],"published":{"date-parts":[[2013,1]]}}}