{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,30]],"date-time":"2026-03-30T14:30:57Z","timestamp":1774881057194,"version":"3.50.1"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,1]]},"DOI":"10.1109\/aspdac.2013.6509612","type":"proceedings-article","created":{"date-parts":[[2013,5,3]],"date-time":"2013-05-03T23:36:53Z","timestamp":1367624213000},"page":"297-304","source":"Crossref","is-referenced-by-count":43,"title":["Fractal video compression in OpenCL: An evaluation of CPUs, GPUs, and FPGAs as acceleration platforms"],"prefix":"10.1109","author":[{"given":"D.","family":"Chen","sequence":"first","affiliation":[]},{"given":"D.","family":"Singh","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"crossref","DOI":"10.1201\/9781420037388","author":"rao","year":"2000","journal-title":"The Transform and Data Compression Handbook"},{"key":"17","year":"2012","journal-title":"Altera Stratix v FPGA Family Overview"},{"key":"18","year":"2012","journal-title":"Altera DE4 Development and Education Board"},{"key":"15","year":"2012","journal-title":"Test Sequences"},{"key":"16","year":"2012","journal-title":"Altera Stratix v FPGA Computing Card"},{"key":"13","article-title":"Implementing fpga design with the opencl standard","author":"singh","year":"2011","journal-title":"Altera Whitepaper"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/83.128028"},{"key":"11","year":"2009","journal-title":"Introduction to GPU Computing with OpenCL"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2011.45"},{"key":"3","year":"0"},{"key":"20","year":"2012","journal-title":"A Development Environment for OpenCL Applications"},{"key":"2","year":"2012","journal-title":"CUDA Toolkit Documentation"},{"key":"1","year":"0"},{"key":"10","year":"0"},{"key":"7","article-title":"Toward real time fractal image compression using graphics hardware","volume":"3804","author":"erra","year":"2005","journal-title":"Proc The International Symposium on Visual Computing 2005"},{"key":"6","first-page":"167","article-title":"Acceleration of fractal image compression using the hardware-software co-design methodology","author":"alvarado","year":"2009","journal-title":"2009 International Conference on Reconfigurable Computing and FPGAs"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4612-2472-3"},{"key":"4","article-title":"Fractal modelling of real world images","author":"barnsley","year":"1993","journal-title":"Fractals Everywhere"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/MELCON.2000.880008"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1142\/S0218348X94000508"}],"event":{"name":"2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013)","location":"Yokohama","start":{"date-parts":[[2013,1,22]]},"end":{"date-parts":[[2013,1,25]]}},"container-title":["2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6507004\/6509548\/06509612.pdf?arnumber=6509612","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T12:31:15Z","timestamp":1498048275000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6509612\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,1]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2013.6509612","relation":{},"subject":[],"published":{"date-parts":[[2013,1]]}}}