{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T20:46:19Z","timestamp":1725569179058},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,1]]},"DOI":"10.1109\/aspdac.2013.6509669","type":"proceedings-article","created":{"date-parts":[[2013,5,3]],"date-time":"2013-05-03T19:36:53Z","timestamp":1367609813000},"page":"632-637","source":"Crossref","is-referenced-by-count":0,"title":["An efficient compression scheme for checkpointing of FPGA-based digital mockups"],"prefix":"10.1109","author":[{"family":"Ting-Shuo Chou","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Givargis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Chen Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"B.","family":"Miller","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Vahid","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/DCC.2006.47"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1977.1055714"},{"year":"0","key":"14"},{"key":"11","article-title":"Stochastic simulation for biochemical reactions of FPGA","author":"yoshimi","year":"2004","journal-title":"FPL"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-87553-3"},{"key":"3","article-title":"Hardware acceleration for real time simulation of physiological systems","author":"pimental","year":"2006","journal-title":"Engineering in Medicine and Biology Society"},{"year":"0","author":"drosdol","key":"2"},{"year":"2009","key":"1"},{"key":"10","article-title":"Instrumenting bitstreams for debugging FPGA circuits","author":"graham","year":"2001","journal-title":"FCCM"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/2110363.2110473"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2010.36"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1016\/j.medengphy.2006.05.010"},{"key":"4","article-title":"Hardware-in-loop simulator for mini aerial vehicle","author":"gholkar","year":"2004","journal-title":"Sixth Real-Time Linux Workshop"},{"key":"9","article-title":"Using design-level scan to improve fpga design observability and controllability for functional verification","author":"wheeler","year":"2001","journal-title":"FCCM"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2011.2170152"}],"event":{"name":"2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013)","start":{"date-parts":[[2013,1,22]]},"location":"Yokohama","end":{"date-parts":[[2013,1,25]]}},"container-title":["2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6507004\/6509548\/06509669.pdf?arnumber=6509669","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T00:19:27Z","timestamp":1490228367000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6509669\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,1]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2013.6509669","relation":{},"subject":[],"published":{"date-parts":[[2013,1]]}}}