{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T02:49:32Z","timestamp":1729651772367,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,1]]},"DOI":"10.1109\/aspdac.2014.6742965","type":"proceedings-article","created":{"date-parts":[[2014,2,21]],"date-time":"2014-02-21T21:20:31Z","timestamp":1393017631000},"page":"652-657","source":"Crossref","is-referenced-by-count":0,"title":["A segmentation-based BISR scheme"],"prefix":"10.1109","author":[{"given":"Georgios","family":"Zervakis","sequence":"first","affiliation":[]},{"given":"Nikolaos","family":"Eftaxiopoulos","sequence":"additional","affiliation":[]},{"given":"Kostas","family":"Tsoumanis","sequence":"additional","affiliation":[]},{"given":"Nicholas","family":"Axelos","sequence":"additional","affiliation":[]},{"given":"Kiamal","family":"Pekmestzi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"17","first-page":"179","article-title":"Wide Structures","author":"sutherland","year":"1999","journal-title":"Logical Effort Designing Fast CMOS Circuits Morgan Kaufmann"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2170593"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2010.5560217"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/MTDT.1999.782683"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/MTDT.2001.945228"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2007.4"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.903940"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2003.1198687"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/MTDT.2004.1327984"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/MTDT.2004.1327987"},{"key":"1","first-page":"722","article-title":"Challenges in embedded memory design and test","author":"manmssen","year":"2005","journal-title":"Proc Design Automation and Test in Europe"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/24.994929"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2001.966724"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ICVC.1999.821012"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743312"},{"key":"9","first-page":"219","article-title":"Sram word-oriented redundancy methodology using built in self-repair","author":"lee","year":"2004","journal-title":"IEEE Proc Int SOC Conf"},{"key":"8","doi-asserted-by":"crossref","first-page":"742","DOI":"10.1109\/TVLSI.2005.848824","article-title":"A built-in self-repair design for rams with 2-d redundancy","volume":"13","author":"li","year":"2005","journal-title":"IEEE Trans VLSI Systems"}],"event":{"name":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","start":{"date-parts":[[2014,1,20]]},"location":"Singapore","end":{"date-parts":[[2014,1,23]]}},"container-title":["2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6736726\/6742831\/06742965.pdf?arnumber=6742965","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T08:21:01Z","timestamp":1498119661000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6742965\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,1]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2014.6742965","relation":{},"subject":[],"published":{"date-parts":[[2014,1]]}}}