{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,17]],"date-time":"2026-06-17T16:33:36Z","timestamp":1781714016366,"version":"3.54.5"},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,1]]},"DOI":"10.1109\/aspdac.2014.6742973","type":"proceedings-article","created":{"date-parts":[[2014,2,21]],"date-time":"2014-02-21T16:20:31Z","timestamp":1392999631000},"page":"708-713","source":"Crossref","is-referenced-by-count":8,"title":["Timing anomalies in multi-core architectures due to the interference on the shared resources"],"prefix":"10.1109","author":[{"given":"Hardik","family":"Shah","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kai","family":"Huang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alois","family":"Knoll","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1145\/2086696.2086713"},{"key":"17","author":"gustafsson","year":"0","journal-title":"The Ma?lardalen WCET Benchmarks - Past Present and Future"},{"key":"18","article-title":"Assessing the suitability of the ngmp multicore processor in the space domain","author":"ferna?ndez","year":"0","journal-title":"11th EMSOFT"},{"key":"15","article-title":"A unified wcet analysis framework for multi-core platforms","author":"chattopadhyay","year":"2012","journal-title":"RTAS"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2011.9"},{"key":"13","article-title":"Modeling out-of-order processors for software timing analysis","author":"li","year":"2004","journal-title":"RTSS"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2009.8"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.075"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2010.2041634"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763319"},{"key":"3","article-title":"Timing anomalies reloaded","author":"gebhard","year":"0","journal-title":"WCET 2010"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/EDCC.2012.27"},{"key":"2","author":"reineke","year":"2006","journal-title":"A Definition and Classification of Timing Anomalies"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.1999.818824"},{"key":"10","year":"2012","journal-title":"Dynamic Priority Queue An SDRAM Arbiter with Bounded Access Latencies for Tight WCET Calculation"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2010.30"},{"key":"6","year":"0","journal-title":"Avalon Interface Specifications"},{"key":"5","year":"0","journal-title":"Advance Microcontroller Bus Architecture (Amba)"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/1347375.1347389"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176554"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.156"}],"event":{"name":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","location":"Singapore","start":{"date-parts":[[2014,1,20]]},"end":{"date-parts":[[2014,1,23]]}},"container-title":["2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6736726\/6742831\/06742973.pdf?arnumber=6742973","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T19:12:37Z","timestamp":1490296357000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6742973\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,1]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2014.6742973","relation":{},"subject":[],"published":{"date-parts":[[2014,1]]}}}