{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:48:20Z","timestamp":1730198900616,"version":"3.28.0"},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,1]]},"DOI":"10.1109\/aspdac.2015.7058982","type":"proceedings-article","created":{"date-parts":[[2015,3,13]],"date-time":"2015-03-13T21:06:37Z","timestamp":1426280797000},"page":"61-68","source":"Crossref","is-referenced-by-count":2,"title":["A flexible hardware barrier mechanism for many-core processors"],"prefix":"10.1109","author":[{"given":"Takeshi","family":"Soga","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiroshi","family":"Sasaki","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tomoya","family":"Hirao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masaaki","family":"Kondo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Koji","family":"Inoue","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2009.370"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/237090.237144"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2011.5722310"},{"journal-title":"Ise Simulator (isim)","year":"2012","author":"xilinx","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/BF01407877"},{"journal-title":"Xst Synthesis Overview","year":"2012","author":"xilinx","key":"ref15"},{"journal-title":"Virtex-6 FPGA ML605 Evaluation Kit","year":"2012","author":"xilinx","key":"ref16"},{"journal-title":"Blue Gene L Hardware Overview and Planning","year":"2006","author":"milano","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1450095.1450110"},{"key":"ref19","first-page":"18","article-title":"Low-overhead, high-speed multicore barrier synchronization","volume":"5952","author":"sartori","year":"2010","journal-title":"HiP EA C '10"},{"journal-title":"Parallel Programming Techniques and Applications Using Networked Workstations and Parallel Computers","year":"1999","author":"wilkinson","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.23"},{"journal-title":"OpenMP application program interface OpenMP ARB","year":"0","key":"ref6"},{"journal-title":"MPI A Message-Passing Interface Standard Message Passing Interface Forum","year":"0","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1147\/rd.492.0195"},{"journal-title":"IEEE POSIX 1003 1c standard IEEE","year":"0","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000078"},{"journal-title":"TILE-Gx-3000 Series","year":"2012","author":"tilera","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2004.09.004"},{"key":"ref20","first-page":"90","article-title":"An 8640 MIPS SoC with independent power-Off control of 8 CPU sand 8 RAMs by an automatic parallelizing compiler","author":"ito","year":"2008","journal-title":"ISSCC\/DAC'08"},{"key":"ref22","first-page":"343","article-title":"Adding low-cost hardware barrier support to small commodity clusters systems","author":"hoefler","year":"2006","journal-title":"ARC '06"},{"key":"ref21","first-page":"267","article-title":"A g-line-based networ k for fast and efficient barrier synchronization in manycore cmps","author":"abelian","year":"2010","journal-title":"ICPP '10"}],"event":{"name":"2015 20th Asia and South Pacific Design Automation Conference (ASP-DAC)","start":{"date-parts":[[2015,1,19]]},"location":"Chiba, Japan","end":{"date-parts":[[2015,1,22]]}},"container-title":["The 20th Asia and South Pacific Design Automation Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7050531\/7058915\/07058982.pdf?arnumber=7058982","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T18:09:27Z","timestamp":1490378967000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7058982\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,1]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2015.7058982","relation":{},"subject":[],"published":{"date-parts":[[2015,1]]}}}