{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:47:47Z","timestamp":1729633667273,"version":"3.28.0"},"reference-count":26,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,1]]},"DOI":"10.1109\/aspdac.2015.7059095","type":"proceedings-article","created":{"date-parts":[[2015,3,13]],"date-time":"2015-03-13T21:06:37Z","timestamp":1426280797000},"page":"719-724","source":"Crossref","is-referenced-by-count":0,"title":["GPU-accelerated parallel Monte Carlo analysis of analog circuits by hierarchical graph-based solver"],"prefix":"10.1109","author":[{"given":"Yan","family":"Zhu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sheldon X.-D.","family":"Tan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"NVIDIA Corporation","article-title":"CUDA (Compute Unified Device Architecture)","year":"2011","key":"ref10"},{"journal-title":"AMD Inc","article-title":"AMD Steam SDK","year":"2011","key":"ref11"},{"journal-title":"Khronos Group","article-title":"Open Computing Language (OpenCL)","year":"2011","key":"ref12"},{"year":"0","key":"ref13","article-title":"Openacc directives for accelerators"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629961"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837443"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2059718"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2012.6328984"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691171"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2012.6187484"},{"key":"ref4","article-title":"Fast, non-monte-carlo estimation of transient performance variation due to device mismatch","author":"kim","year":"2007","journal-title":"Proc IEEE\/ACM Design Automation Conference (DAC)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2005.1568738"},{"journal-title":"AMD Inc","article-title":"Multi-core processors-the next evolution in computing (White Paper)","year":"2006","key":"ref6"},{"journal-title":"Intel Corporation","article-title":"Intel multi-core processors, making the move to quad-core and beyond (White Paper)","year":"2006","key":"ref5"},{"year":"0","key":"ref8","article-title":"NVIDIA Tesla's Servers and Workstations"},{"journal-title":"Programming Massively Parallel Processors A Hands-on Approach 2ed","year":"2013","author":"kirk","key":"ref7"},{"key":"ref2","article-title":"Model to hardware correlation for nm-scale technologies","author":"nassif","year":"2007","journal-title":"Proc IEEE Int Behavioral Modeling and Simulation (BMAS) Workshop"},{"article-title":"General-purpose computation using graphics harware","year":"2011","author":"g\u00f6ddeke","key":"ref9"},{"key":"ref1","article-title":"Next-generation design and EDA challenges","author":"rutenbar","year":"2007","journal-title":"Proc Asia South Pacific Design Automation Conf (ASPDAC)"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837467"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796514"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-0944-2"},{"key":"ref24","first-page":"851","article-title":"Parallel statistical analysis of analog circuits by gpu-accelerated graph-based approach","author":"liu","year":"2012","journal-title":"Proc Design Automation and Test in Europe (DATE)"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228565"},{"key":"ref26","doi-asserted-by":"crossref","first-page":"401","DOI":"10.1109\/43.838990","article-title":"Hierarchical symbolic analysis of large analog circuits via determinant decision diagrams","volume":"19","author":"tan","year":"2000","journal-title":"IEEE Trans on Computer Aided Design of Integrated Circuits and Systems"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/43.822616"}],"event":{"name":"2015 20th Asia and South Pacific Design Automation Conference (ASP-DAC)","start":{"date-parts":[[2015,1,19]]},"location":"Chiba, Japan","end":{"date-parts":[[2015,1,22]]}},"container-title":["The 20th Asia and South Pacific Design Automation Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7050531\/7058915\/07059095.pdf?arnumber=7059095","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T07:20:02Z","timestamp":1498202402000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7059095\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,1]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2015.7059095","relation":{},"subject":[],"published":{"date-parts":[[2015,1]]}}}