{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,21]],"date-time":"2026-02-21T20:33:25Z","timestamp":1771706005334,"version":"3.50.1"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,1]]},"DOI":"10.1109\/aspdac.2017.7858364","type":"proceedings-article","created":{"date-parts":[[2017,2,20]],"date-time":"2017-02-20T16:36:54Z","timestamp":1487608614000},"page":"450-455","source":"Crossref","is-referenced-by-count":45,"title":["An effective legalization algorithm for mixed-cell-height standard cells"],"prefix":"10.1109","author":[{"given":"Chao-Hung","family":"Wang","sequence":"first","affiliation":[]},{"given":"Yen-Yi","family":"Wu","sequence":"additional","affiliation":[]},{"given":"Jianli","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Yao-Wen","family":"Chang","sequence":"additional","affiliation":[]},{"given":"Sy-Yen","family":"Kuo","sequence":"additional","affiliation":[]},{"given":"Wenxing","family":"Zhu","sequence":"additional","affiliation":[]},{"given":"Genghua","family":"Fan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372660"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898038"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1353629.1353640"},{"key":"ref6","article-title":"Method and system for high speed detailed placement of cells within integrated circuit designs","author":"hill","year":"2002"},{"key":"ref11","author":"wang","year":"2009","journal-title":"Electronic Design Automation Synthesis Verification and Testing"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/641876.641880"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2004.831522"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.1999.760005"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2717764.2723572"},{"key":"ref9","article-title":"Detailed Placement Algorithm for VLSI Design with Double-Row Height Standard Cells","author":"wu","year":"2015","journal-title":"Proc TCAD"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1117\/12.813462"}],"event":{"name":"2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)","location":"Chiba, Japan","start":{"date-parts":[[2017,1,16]]},"end":{"date-parts":[[2017,1,19]]}},"container-title":["2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7847727\/7858249\/07858364.pdf?arnumber=7858364","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,9]],"date-time":"2017-03-09T08:04:54Z","timestamp":1489046694000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7858364\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,1]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2017.7858364","relation":{},"subject":[],"published":{"date-parts":[[2017,1]]}}}