{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,21]],"date-time":"2026-02-21T19:35:37Z","timestamp":1771702537447,"version":"3.50.1"},"reference-count":26,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,1]]},"DOI":"10.1109\/aspdac.2017.7858371","type":"proceedings-article","created":{"date-parts":[[2017,2,20]],"date-time":"2017-02-20T21:36:54Z","timestamp":1487626614000},"page":"494-499","source":"Crossref","is-referenced-by-count":8,"title":["Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems"],"prefix":"10.1109","author":[{"given":"Lei","family":"Yang","sequence":"first","affiliation":[]},{"given":"Weichen","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Nan","family":"Guan","sequence":"additional","affiliation":[]},{"given":"Mengquan","family":"Li","sequence":"additional","affiliation":[]},{"given":"Peng","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Edwin H. M.","family":"Sha","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428097"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CODESISSS.2015.7331380"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488949"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333720"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2011.156"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2656075.2656091"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2014.40"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/HPCC-CSS-ICESS.2015.59"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"213","DOI":"10.1145\/2366231.2337184","article-title":"Scheduling heterogeneous multi-cores through performance impact estimation (pie)","volume":"40","author":"van","year":"2012","journal-title":"Proc SIGARCH Comput Archit News"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/SOCDC.2010.5682890"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2015.30"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2014.2313342"},{"key":"ref6","article-title":"Advances in big. little technology for power and energy savings","author":"jeff","year":"2012","journal-title":"ARM TechCon"},{"key":"ref5","year":"2011"},{"key":"ref8","year":"2015"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2701126.2701150"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2656075.2661645"},{"key":"ref9","first-page":"109:1","article-title":"Smart-balance: a sensing-driven linux load balancer for energy efficiency of heterogeneous mpsocs","author":"sarma","year":"2015","journal-title":"Proc DAC"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593229"},{"key":"ref20","first-page":"406","article-title":"An efficient algorithm for the physical mapping of clustered task graphs onto multiprocessor architectures","author":"koziris","year":"2000","journal-title":"Proc of PDP"},{"key":"ref22","article-title":"Matex: Efficient transient and peak temperature computation for compact thermal models","author":"pagani","year":"2015","journal-title":"Proc of DATE"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2011229"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/HSC.1998.666245"},{"key":"ref26","first-page":"1874","article-title":"Efficient parallelization of h. 264 decoding with macro block level scheduling","author":"jike","year":"2007","journal-title":"Proc of ICME"},{"key":"ref25","article-title":"Dspstone: A dsp-oriented benchmarking methodology","author":"zivojnovic","year":"1994","journal-title":"Proc ICSP"}],"event":{"name":"2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)","location":"Chiba, Japan","start":{"date-parts":[[2017,1,16]]},"end":{"date-parts":[[2017,1,19]]}},"container-title":["2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7847727\/7858249\/07858371.pdf?arnumber=7858371","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,18]],"date-time":"2019-09-18T22:13:50Z","timestamp":1568844830000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7858371\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,1]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/aspdac.2017.7858371","relation":{},"subject":[],"published":{"date-parts":[[2017,1]]}}}