{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,2]],"date-time":"2025-10-02T05:55:23Z","timestamp":1759384523113},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,11]]},"DOI":"10.1109\/asscc.2016.7844150","type":"proceedings-article","created":{"date-parts":[[2017,2,10]],"date-time":"2017-02-10T10:58:46Z","timestamp":1486724326000},"page":"121-124","source":"Crossref","is-referenced-by-count":3,"title":["Reprogrammable redundancy for cache V<inf>min<\/inf> reduction in a 28nm RISC-V processor"],"prefix":"10.1109","author":[{"given":"Brian","family":"Zimmer","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pi-Feng","family":"Chiu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Borivoje","family":"Nikolic","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Krste","family":"Asanovic","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"74","article-title":"A 32nm Westmere-EX Xeon enterprise processor","author":"sawant","year":"2011","journal-title":"IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892185"},{"key":"ref10","first-page":"316","article-title":"A 20nm 112Mb SRAM in High-K: metal-gate with assist circuitry for low-leakage and low-V MIN applications","author":"chang","year":"2013","journal-title":"IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers"},{"key":"ref6","first-page":"461","article-title":"Energy-efficient cache design using variable-strength error-correcting codes","author":"alameldeen","year":"2011","journal-title":"2011 38th Annual International Symposium on Computer Architecture (ISCA) ISCA"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418029"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522347"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2014.6942056"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.21236\/ADA605735"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2258815"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2008.4674921"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063050"}],"event":{"name":"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)","start":{"date-parts":[[2016,11,7]]},"location":"Toyama, Japan","end":{"date-parts":[[2016,11,9]]}},"container-title":["2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7833314\/7844119\/07844150.pdf?arnumber=7844150","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,10,2]],"date-time":"2017-10-02T22:53:35Z","timestamp":1506984815000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7844150\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,11]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/asscc.2016.7844150","relation":{},"subject":[],"published":{"date-parts":[[2016,11]]}}}