{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T10:51:01Z","timestamp":1730199061817,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1109\/asscc.2018.8579345","type":"proceedings-article","created":{"date-parts":[[2019,1,8]],"date-time":"2019-01-08T22:59:07Z","timestamp":1546988347000},"page":"13-16","source":"Crossref","is-referenced-by-count":3,"title":["Logic Process Compatible 40nm 256K\u00d7144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window"],"prefix":"10.1109","author":[{"given":"Chien-An","family":"Lai","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chung-Cheng","family":"Chou","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chi-Hsiang","family":"Weng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zheng-Jun","family":"Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pei-Ling","family":"Tseng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chien-Fan","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chih-Chen","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chin-I","family":"Su","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei-Chi","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu-Cheng","family":"Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tong-Chern","family":"Ong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chi","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu-Der","family":"Chih","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tsung-Yung","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"552","author":"sedra","year":"2004","journal-title":"Microelectronic Circuits"},{"key":"ref3","first-page":"309","article-title":"Design of Analog CMOS Integrated Circuits","author":"razavi","year":"2001","journal-title":"McGraw-Hill Higher Education"},{"key":"ref6","article-title":"A Low Power CMOS Bandgap Voltage Reference with Enhanced Power Supply Rejection","author":"li","year":"2009","journal-title":"IEEE ASICON"},{"key":"ref5","first-page":"48","article-title":"Enhanced write performance of a 64-mb phase change random access memory","author":"oh","year":"2005","journal-title":"ISSCC"},{"key":"ref7","first-page":"478","article-title":"An N40 256K&#x00D7;44 embedded RRAM macro with SL-precharge SA and low-voltage current limiter to improve read and write performance","author":"chou","year":"2018","journal-title":"ISSCC"},{"key":"ref2","first-page":"102t","article-title":"Reliability Significant Improvement of Resistive Switching Memory by Dynamic Self-adaptive Write Method","author":"song","year":"2013","journal-title":"VLSI Technology Symposium"},{"key":"ref1","article-title":"A 0.13um 8Mb Logic-Based Cu Si O ReRAM with Self-Adaptive Operation for Yield Enhancement and Power Reduction","volume":"48","author":"xue","year":"2013","journal-title":"IEEE JSSCC"}],"event":{"name":"2018 IEEE Asian Solid-State Circuits Conference (A-SSCC)","start":{"date-parts":[[2018,11,5]]},"location":"Tainan, Taiwan","end":{"date-parts":[[2018,11,7]]}},"container-title":["2018 IEEE Asian Solid-State Circuits Conference (A-SSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8547238\/8579249\/08579345.pdf?arnumber=8579345","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,24]],"date-time":"2020-08-24T02:31:32Z","timestamp":1598236292000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8579345\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/asscc.2018.8579345","relation":{},"subject":[],"published":{"date-parts":[[2018,11]]}}}