{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:05:19Z","timestamp":1729659919443,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/async.2003.1199172","type":"proceedings-article","created":{"date-parts":[[2003,10,8]],"date-time":"2003-10-08T15:04:05Z","timestamp":1065625445000},"page":"121-130","source":"Crossref","is-referenced-by-count":3,"title":["An analysis of determinacy using a trace-theoretic model of asynchronous circuits"],"prefix":"10.1109","author":[{"given":"M.B.","family":"Josephs","sequence":"first","affiliation":[]}],"member":"263","reference":[{"journal-title":"Communication and Concurrency","year":"1989","author":"milner","key":"ref10"},{"key":"ref11","first-page":"204","article-title":"A Theory of Asynchronous Circuits","author":"muller","year":"0"},{"key":"ref12","first-page":"218","article-title":"System Timing","author":"seitz","year":"1980","journal-title":"Introduction to VLSI Systems"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"155","DOI":"10.1007\/BF01384076","article-title":"Correct Compilation of Specifications of Deterministic Asynchronous Circuits","volume":"7","author":"scott","year":"1995","journal-title":"Formal Methods in System Design"},{"journal-title":"Classification and Composition of Delay-Insensitive Circuits","year":"1984","author":"udding","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/WCADM.1995.514647"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-009-0487-3"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1998.666503"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/320856.320866"},{"journal-title":"Communicating Sequential Processes","year":"1985","author":"hoare","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/BF01211298"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/BF01178564"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"102","DOI":"10.1007\/3-540-07135-0_113","article-title":"A fundamental theorem of asynchronous parallel computation","volume":"24","author":"keller","year":"1975","journal-title":"Lect Notes in Comp Sci"},{"key":"ref7","first-page":"471","article-title":"The semantics of a simple language for parallel programming","author":"kahn","year":"1974","journal-title":"Information Processing ‘74"},{"key":"ref2","article-title":"Trace Theory for Automatic Hierarchical Verification of Speed-Independent Circuits","author":"dill","year":"1989","journal-title":"ACM Distinguished Series"},{"key":"ref9","first-page":"1","article-title":"Programming in VLSI: From Commmunicating Processes to Delay-Insensitive Circuits","author":"martin","year":"1989","journal-title":"UT Year of Programming Institute on Concurrent Pro-gramming"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1996.494442"}],"event":{"name":"Ninth International Symposium on Asynchronous Circuits and Systems","acronym":"ASYNC-03","location":"Vancouver, BC, Canada"},"container-title":["Ninth International Symposium on Asynchronous Circuits and Systems, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8538\/26997\/01199172.pdf?arnumber=1199172","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T20:59:21Z","timestamp":1497560361000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1199172\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/async.2003.1199172","relation":{},"subject":[]}}