{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T07:47:31Z","timestamp":1729669651938,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,10]]},"DOI":"10.1109\/biocas.2014.6981810","type":"proceedings-article","created":{"date-parts":[[2014,12,30]],"date-time":"2014-12-30T21:51:03Z","timestamp":1419976263000},"page":"651-654","source":"Crossref","is-referenced-by-count":1,"title":["Design of a low-power adaptive LMS equalizer for hearing-aid applications"],"prefix":"10.1109","author":[{"given":"Joao Pedro","family":"da Silva Cerqueira","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sandro Augusto","family":"Pavlik Haddad","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/89.848225"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1985.13298"},{"key":"10","article-title":"Sub-threshold design: The cha llenges of minimizing circuit energy","author":"calhoun","year":"2006","journal-title":"International Symposium on Low Power Electronics and Design (ISLPED"},{"key":"1","doi-asserted-by":"crossref","first-page":"1058","DOI":"10.1109\/TVLSI.2003.819573","article-title":"Ultra-low power dlms adaptive filter for hearing aid applications","volume":"11","author":"kim","year":"2003","journal-title":"IEEE Transactions on Very Large Scale Integrated (VLSI) Systems"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-68606-6"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-09734-3_2"},{"journal-title":"Advanced Digital Design with the Verilog HDL","year":"2005","author":"ciletti","key":"5"},{"journal-title":"A Sub-threshold Cell Library and Methodology","year":"2006","author":"kwong","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.837945"},{"journal-title":"Digital VLSI Systems Design A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog","year":"2007","author":"ramachandran","key":"8"}],"event":{"name":"2014 IEEE Biomedical Circuits and Systems Conference (BioCAS)","start":{"date-parts":[[2014,10,22]]},"location":"Lausanne, Switzerland","end":{"date-parts":[[2014,10,24]]}},"container-title":["2014 IEEE Biomedical Circuits and Systems Conference (BioCAS) Proceedings"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6968677\/6981625\/06981810.pdf?arnumber=6981810","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T02:52:51Z","timestamp":1498186371000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6981810\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,10]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/biocas.2014.6981810","relation":{},"subject":[],"published":{"date-parts":[[2014,10]]}}}