{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,11]],"date-time":"2026-06-11T15:02:39Z","timestamp":1781190159089,"version":"3.54.1"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007]]},"DOI":"10.1109\/cadcg.2007.4407904","type":"proceedings-article","created":{"date-parts":[[2008,7,18]],"date-time":"2008-07-18T13:19:35Z","timestamp":1216387175000},"page":"332-337","source":"Crossref","is-referenced-by-count":0,"title":["Simultaneous Switching Noise Consideration for Power\/Ground Network Optimization"],"prefix":"10.1109","author":[{"family":"Le Kang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yici","family":"Cai","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jin","family":"Shi","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xianlong","family":"Hong","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sheldon X.-D.","family":"Tan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiaoyi","family":"Wang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","first-page":"638","article-title":"Power Supply Noise Analysis Methodology for Deep-submicron VLSI Chip Design","author":"chen","year":"1997","journal-title":"Proc of the 34th DAC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2002.800533"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.5948\/UPO9781614440222"},{"key":"ref6","first-page":"153","article-title":"Area minimization of power distribution network using efficient nonlinear programming techniques","author":"wu","year":"2001","journal-title":"Proc of ICCAD"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775860"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1992.227748"},{"key":"ref12","first-page":"2401","article-title":"In-depth Exprimental Study of Power Grid Network Analysis using Random Walks Algorithm","author":"kang","year":"2006","journal-title":"ICCCAS Conf"},{"key":"ref8","first-page":"505","article-title":"A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery","author":"fu","year":"2004","journal-title":"Proc of ASPDAC"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/505388.505405"},{"key":"ref2","first-page":"163","article-title":"Simultaneous Switching Noise and Resonance Analysis of On-Chip Power Distribution Network","author":"bai","year":"2002","journal-title":"Proc of ISQED"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065627"},{"key":"ref1","year":"2005","journal-title":"The International Technology Roadmap for Semiconductors (ITRS)"}],"event":{"name":"2007 10th IEEE International Conference on Computer-Aided Design and Computer Graphics","location":"Beijing, China","start":{"date-parts":[[2007,10,15]]},"end":{"date-parts":[[2007,10,18]]}},"container-title":["2007 10th IEEE International Conference on Computer-Aided Design and Computer Graphics"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4407819\/4407820\/04407904.pdf?arnumber=4407904","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,11]],"date-time":"2026-06-11T14:28:33Z","timestamp":1781188113000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4407904\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/cadcg.2007.4407904","relation":{},"subject":[],"published":{"date-parts":[[2007]]}}}