{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T01:54:57Z","timestamp":1725587697271},"reference-count":26,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,8,30]],"date-time":"2020-08-30T00:00:00Z","timestamp":1598745600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,8,30]],"date-time":"2020-08-30T00:00:00Z","timestamp":1598745600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,8,30]],"date-time":"2020-08-30T00:00:00Z","timestamp":1598745600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,8,30]]},"DOI":"10.1109\/ccece47787.2020.9255748","type":"proceedings-article","created":{"date-parts":[[2020,11,20]],"date-time":"2020-11-20T05:26:07Z","timestamp":1605849967000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["Learning-Based Reconfigurable Cache for Heterogeneous Chip Multiprocessors"],"prefix":"10.1109","author":[{"given":"Furat","family":"Al-Obaidy","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Araghvan","family":"Asad","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Farah A.","family":"Mohammadi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1561\/1000000031"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1016\/j.sysarc.2013.03.011"},{"year":"2014","author":"shen","journal-title":"Adaptive power management for computers and mobile devices","key":"ref12"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/UCC.2012.34"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/TC.2013.67"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1109\/CCECE.2019.8861876"},{"key":"ref16","article-title":"Machine learning for power, energy, and thermal management on multi-core processors: A survey","author":"pagani","year":"2018","journal-title":"IEEE Trans Comput Aided Design of Integr Circuits Syst"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/ASPDAC.2017.7858403"},{"key":"ref18","first-page":"1","article-title":"HaDeS: Architectural synthesis for heterogeneous dark silicon chip multiprocessors","author":"turakhia","year":"0","journal-title":"Proc DAC"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1142\/S0218126619502244"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.3850\/9783981537079_0454"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1145\/3323055"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1016\/j.micpro.2017.03.011"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/TC.2018.2889053"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/MC.2018.3011040"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/CCECE.2019.8861762"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1145\/2024723.2000074"},{"key":"ref9","first-page":"365","article-title":"Dark silicon and the end of multicore scaling","author":"esmaeilzadeh","year":"2011","journal-title":"2011 38th Annual International Symposium on Computer Architecture (ISCA) ISCA"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1145\/1394608.1382159"},{"doi-asserted-by":"publisher","key":"ref20","DOI":"10.4218\/etrij.2017-0095"},{"doi-asserted-by":"publisher","key":"ref22","DOI":"10.1016\/j.compeleceng.2017.01.014"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.3390\/jlpea7030023"},{"doi-asserted-by":"publisher","key":"ref24","DOI":"10.1109\/LCA.2015.2402435"},{"year":"0","key":"ref23"},{"doi-asserted-by":"publisher","key":"ref26","DOI":"10.1145\/1454115.1454128"},{"doi-asserted-by":"publisher","key":"ref25","DOI":"10.1145\/1669112.1669172"}],"event":{"name":"2020 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)","start":{"date-parts":[[2020,8,30]]},"location":"London, ON, Canada","end":{"date-parts":[[2020,9,2]]}},"container-title":["2020 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9255668\/9255669\/09255748.pdf?arnumber=9255748","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,28]],"date-time":"2022-06-28T21:49:04Z","timestamp":1656452944000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9255748\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,8,30]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/ccece47787.2020.9255748","relation":{},"subject":[],"published":{"date-parts":[[2020,8,30]]}}}