{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T01:07:30Z","timestamp":1729645650035,"version":"3.28.0"},"reference-count":28,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,7]]},"DOI":"10.1109\/cec.2010.5586298","type":"proceedings-article","created":{"date-parts":[[2010,9,29]],"date-time":"2010-09-29T19:54:29Z","timestamp":1285790069000},"page":"1-7","source":"Crossref","is-referenced-by-count":1,"title":["Synthesis of quantum arrays with low quantum costs from Kronecker Functional Lattice Diagrams"],"prefix":"10.1109","author":[{"given":"Dipal","family":"Shah","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marek","family":"Perkowski","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/TCAD.2004.836735"},{"year":"2004","author":"maslov","journal-title":"Reversible logic synthesis benchmarks page","key":"ref11"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/TVLSI.2005.844284"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/TCAD.2005.847911"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/DATE.2005.249"},{"year":"2005","author":"maslov","article-title":"Reversible Logic Synthesis Benchmarks","key":"ref15"},{"key":"ref16","first-page":"85","article-title":"Lattice Diagrams Using Reed-Muller Logic","author":"perkowski","year":"1997","journal-title":"Proc RM'97 Conference"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/ICICS.1997.647099"},{"key":"ref18","first-page":"115","article-title":"New Hierarchies of AND\/EXOR Trees, Decision Diagrams, Lattice Diagrams, Canonical Forms and Regular Layouts","author":"perkowski","year":"1997","journal-title":"Proc of the Reed-Muller 1997 Conference"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1109\/DSD.2001.952289"},{"year":"2010","author":"perkowski","article-title":"Synthesis of quantum circuits in Linear Nearest Neighbor Model using Positive Davio Lattices, submitted","key":"ref28"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1145\/62882.62907"},{"key":"ref27","first-page":"219","article-title":"A Canonical AND\/EXOR Form that Includes both the Generalized Reed-Muller Forms and Kronecker Reed-Muller Forms","author":"perkowski","year":"1997","journal-title":"Proc of the Reed-Muller 1997 Conference"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/TC.1972.5009040"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/TC.1986.1676819"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1103\/PhysRevA.52.3457"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1049\/el:20031202"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1103\/PhysRevLett.74.4091"},{"key":"ref2","first-page":"487","article-title":"On a Theory of Boolean Functions","volume":"7","author":"akers","year":"1959","journal-title":"J of SIAM"},{"key":"ref9","first-page":"162","article-title":"Garbage in reversible design of multiple output functions","author":"maslov","year":"2003","journal-title":"Proc 6th Int Symp Representations and Methodology of Future Computing Technologies"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/DATE.2004.1269099"},{"key":"ref20","first-page":"119","article-title":"A general decomposition for reversible logic","author":"perkowski","year":"0","journal-title":"Proc RM'2001"},{"doi-asserted-by":"publisher","key":"ref22","DOI":"10.1109\/TCAD.2003.811448"},{"key":"ref21","first-page":"125","article-title":"Reversible Logic Circuit Synthesis","author":"shende","year":"2002","journal-title":"Proc IEEE\/ACM Int Workshop Logic Synthesis (IWLS)"},{"key":"ref24","first-page":"220","article-title":"RevLib: An online resource for reversible functions and reversible circuits","author":"wille","year":"2008","journal-title":"Proc 38th ISMVL"},{"doi-asserted-by":"publisher","key":"ref23","DOI":"10.1109\/TCAD.2003.811448"},{"key":"ref26","article-title":"Synthesis of Reversible Functions Beyond Gate Count and Quantum Cost","author":"wille","year":"2009","journal-title":"Proc IWLS"},{"key":"ref25","doi-asserted-by":"crossref","first-page":"270","DOI":"10.1145\/1629911.1629984","article-title":"bdd-based synthesis of reversible logic for large functions","author":"wille","year":"2009","journal-title":"2009 46th ACM\/IEEE Design Automation Conference dac"}],"event":{"name":"2010 IEEE Congress on Evolutionary Computation (CEC)","start":{"date-parts":[[2010,7,18]]},"location":"Barcelona, Spain","end":{"date-parts":[[2010,7,23]]}},"container-title":["IEEE Congress on Evolutionary Computation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5573635\/5585910\/05586298.pdf?arnumber=5586298","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T14:37:17Z","timestamp":1497883037000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5586298\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,7]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/cec.2010.5586298","relation":{},"subject":[],"published":{"date-parts":[[2010,7]]}}}