{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,11]],"date-time":"2026-04-11T02:11:25Z","timestamp":1775873485413,"version":"3.50.1"},"reference-count":24,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/cgo.2003.1191544","type":"proceedings-article","created":{"date-parts":[[2003,12,22]],"date-time":"2003-12-22T17:34:10Z","timestamp":1072114450000},"page":"179-190","source":"Crossref","is-referenced-by-count":3,"title":["Phi-predication for light-weight if-conversion"],"prefix":"10.1109","author":[{"family":"Weihaw Chuang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"B.","family":"Calder","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.","family":"Ferrante","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","year":"1999","journal-title":"IA-64 Instruction Set Architecture Guide Rev 1 0"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2001.935596"},{"key":"ref12","author":"kathail","year":"1994","journal-title":"HPL PlayDoh architecture specification Version 1 0 Technical Report HPL-93&#x2013;80"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/40.755465"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/BF01205182"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"138","DOI":"10.1145\/223982.225965","article-title":"A comparison of full and partial predicated execution support for ILP processors","author":"mahlke","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"ref16","author":"park","year":"1991","journal-title":"On Predicated Execution Technical Report HPL-91&#x2013;58"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/2.19820"},{"key":"ref18","article-title":"EPIC: An Architecture for Instruction-Level Parallel Procesors","author":"schlansker","year":"2000","journal-title":"Technical Report HPL-1999&#x2013;111"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/40.877948"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1998.694770"},{"key":"ref3","first-page":"182","article-title":"The impact of if-conversion on branch prediction and program execution on the intel itanium processor","author":"choi","year":"2001","journal-title":"Proceedings of the 34th Annual International Symposium on Microarchitecture"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/115372.115320"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SUPERC.1990.130118"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/70082.68185"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/93542.93592"},{"key":"ref2","article-title":"The Simplescalar Tool Set","author":"burger","year":"1997","journal-title":"Version 2 0 Technical Report CS-TR-97&#x2013;1342"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/40.877949"},{"key":"ref9","year":"2001","journal-title":"Intel Itanium Processor Reference Manual for Software Optimization"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605403"},{"key":"ref22","article-title":"Alpha AXP Architecture Reference Manual","author":"sites","year":"1995"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2001.991124"},{"key":"ref24","doi-asserted-by":"crossref","DOI":"10.1109\/HPCA.2001.903248","article-title":"Register renaming for dynamic execution of predicated code","author":"wang","year":"2001","journal-title":"Proc 7th Int Symp High-Performance Comput Architecture"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003559"}],"event":{"name":"International Symposium on Code Generation and Optimization. CGO 2003","location":"San Francisco, CA, USA","acronym":"CGO-03"},"container-title":["International Symposium on Code Generation and Optimization, 2003. CGO 2003."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8475\/26704\/01191544.pdf?arnumber=1191544","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,12,14]],"date-time":"2024-12-14T18:17:26Z","timestamp":1734200246000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1191544\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/cgo.2003.1191544","relation":{},"subject":[]}}